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Commit 1877bdab authored by Xiaozhe Shi's avatar Xiaozhe Shi
Browse files

power: qpnp-smbcharger: optimize HVDCP 2.0 efficiency 



At 9V, the smbcharger is more efficient at a switching frequency of
1MHz. Switch to this when the driver detects that it is in HVDCP 2.0
mode. Also, switch the VFIX clamping voltage threshold so that the
frequency is maintained.

CRs-Fixed: 910651
Change-Id: I4b8e1d360fe301671e882f20b2460cdb737204b0
Signed-off-by: default avatarXiaozhe Shi <xiaozhes@codeaurora.org>
parent 11e275dd

drivers/power/qpnp-smbcharger.c

+60 −9
Original line number Diff line number Diff line
@@ -1699,6 +1699,21 @@ static int smbchg_set_fastchg_current_raw(struct smbchg_chip *chip, 
#define DCIN_ACTIVE_PWR_SRC_BIT		BIT(0)

#define PARALLEL_REENABLE_TIMER_MS	1000

#define PARALLEL_CHG_THRESHOLD_CURRENT	1800

static bool smbchg_is_usbin_active_pwr_src(struct smbchg_chip *chip)

{

	int rc;

	u8 reg;



	rc = smbchg_read(chip, &reg,

			chip->usb_chgpth_base + ICL_STS_2_REG, 1);

	if (rc < 0) {

		dev_err(chip->dev, "Could not read usb icl sts 2: %d\n", rc);

		return false;

	}



	return !(reg & USBIN_SUSPEND_STS_BIT)

		&& (reg & USBIN_ACTIVE_PWR_SRC_BIT);

}



static int smbchg_parallel_usb_charging_en(struct smbchg_chip *chip, bool en)

{
@@ -2033,19 +2048,11 @@ static bool smbchg_is_parallel_usb_ok(struct smbchg_chip *chip, 
		return false;

	}



	rc = smbchg_read(chip, &reg,

			chip->usb_chgpth_base + ICL_STS_2_REG, 1);

	if (rc < 0) {

		dev_err(chip->dev, "Could not read usb icl sts 2: %d\n", rc);

		return false;

	}



	/*

	 * If USBIN is suspended or not the active power source, do not enable

	 * parallel charging. The device may be charging off of DCIN.

	 */

	if (!!(reg & USBIN_SUSPEND_STS_BIT) ||

				!(reg & USBIN_ACTIVE_PWR_SRC_BIT)) {

	if (!smbchg_is_usbin_active_pwr_src(chip)) {

		pr_smb(PR_STATUS, "USB not active power source: %02x\n", reg);

		return false;

	}
@@ -4062,6 +4069,45 @@ static int smbchg_charging_status_change(struct smbchg_chip *chip) 
	return 0;

}



#define BAT_IF_TRIM7_REG	0xF7

#define CFG_750KHZ_BIT		BIT(1)

#define BB_CLMP_SEL		0xF8

#define BB_CLMP_MASK		SMB_MASK(1, 0)

#define BB_CLMP_VFIX_3338MV	0x1

#define BB_CLMP_VFIX_3512MV	0x2

static int smbchg_set_optimal_charging_mode(struct smbchg_chip *chip, int type)

{

	int rc;

	bool hvdcp2 = (type == POWER_SUPPLY_TYPE_USB_HVDCP

			&& smbchg_is_usbin_active_pwr_src(chip));



	/*

	 * Set the charger switching freq to 1MHZ if HVDCP 2.0,

	 * or 750KHZ otherwise

	 */

	rc = smbchg_sec_masked_write(chip,

			chip->bat_if_base + BAT_IF_TRIM7_REG,

			CFG_750KHZ_BIT, hvdcp2 ? 0 : CFG_750KHZ_BIT);

	if (rc) {

		dev_err(chip->dev, "Cannot set switching freq: %d\n", rc);

		return rc;

	}



	/*

	 * Set the charger switch frequency clamp voltage threshold to 3.338V

	 * if HVDCP 2.0, or 3.512V otherwise.

	 */

	rc = smbchg_sec_masked_write(chip, chip->bat_if_base + BB_CLMP_SEL,

			BB_CLMP_MASK,

			hvdcp2 ? BB_CLMP_VFIX_3338MV : BB_CLMP_VFIX_3512MV);

	if (rc) {

		dev_err(chip->dev, "Cannot set switching freq: %d\n", rc);

		return rc;

	}



	return 0;

}



#define DEFAULT_HVDCP_CHG_MA	3000

#define DEFAULT_WALL_CHG_MA	1800

#define DEFAULT_SDP_MA		100
@@ -4107,6 +4153,11 @@ static int smbchg_change_usb_supply_type(struct smbchg_chip *chip, 
	if (type == POWER_SUPPLY_TYPE_UNKNOWN)

		chip->usb_supply_type = type;



	/* set the correct buck switching frequency */

	rc = smbchg_set_optimal_charging_mode(chip, type);

	if (rc < 0)

		pr_err("Couldn't set charger optimal mode rc=%d\n", rc);



out:

	return rc;

}