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Commit 18495686 authored by Taniya Das's avatar Taniya Das
Browse files

clk: msm: gcc: Add support for 36.61MHz for mclk for 8953 



mclk[0/1/2] requires a new frequency of 36.61MHz to be supported for
client to be able to set the frequency. Add support for the same.

Change-Id: Ia9caf3e7a4fa391a09e38fa69cc5172b5297648b
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 04d53e49

drivers/clk/msm/clock-gcc-8953.c

+4 −0
Original line number Diff line number Diff line
@@ -1159,6 +1159,7 @@ static struct rcg_clk camss_gp1_clk_src = { 
static struct clk_freq_tbl ftbl_mclk0_clk_src[] = {

	F(  24000000, gpll6_main_div2,    1,    2,    45),

	F(  33330000, gpll0_main_div2,   12,    0,     0),

	F(  36610000, gpll6,		  1,    2,    59),

	F(  66667000,           gpll0,   12,    0,     0),

	F_END

};
@@ -1180,6 +1181,7 @@ static struct rcg_clk mclk0_clk_src = { 
static struct clk_freq_tbl ftbl_mclk1_clk_src[] = {

	F(  24000000, gpll6_main_div2,    1,    2,    45),

	F(  33330000, gpll0_main_div2,   12,    0,     0),

	F(  36610000, gpll6,		  1,    2,    59),

	F(  66667000,           gpll0,   12,    0,     0),

	F_END

};
@@ -1201,6 +1203,7 @@ static struct rcg_clk mclk1_clk_src = { 
static struct clk_freq_tbl ftbl_mclk2_clk_src[] = {

	F(  24000000, gpll6_main_div2,    1,    2,    45),

	F(  33330000, gpll0_main_div2,   12,    0,     0),

	F(  36610000, gpll6,		  1,    2,    59),

	F(  66667000,           gpll0,   12,    0,     0),

	F_END

};
@@ -1222,6 +1225,7 @@ static struct rcg_clk mclk2_clk_src = { 
static struct clk_freq_tbl ftbl_mclk3_clk_src[] = {

	F(  24000000, gpll6_main_div2,    1,    2,    45),

	F(  33330000, gpll0_main_div2,   12,    0,     0),

	F(  36610000, gpll6,		  1,    2,    59),

	F(  66667000,           gpll0,   12,    0,     0),

	F_END

};