clk: msm: clock-pll: Always set the rate in variable-rate pll handoff

Even if a variable-rate PLL is disabled, record its rate in the
clk->rate field, so that handoff of the clock tree can take
place.

Change-Id: I91af11d7f0dddc1d0ec59c84de22357c9a5576e6
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>