Loading drivers/base/regmap/regmap-irq.c +25 −0 Original line number Diff line number Diff line Loading @@ -418,6 +418,31 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, reg, ret); goto err_alloc; } if (!chip->init_ack_masked) continue; /* Ack masked but set interrupts */ reg = chip->status_base + (i * map->reg_stride * d->irq_reg_stride); ret = regmap_read(map, reg, &d->status_buf[i]); if (ret != 0) { dev_err(map->dev, "Failed to read IRQ status: %d\n", ret); goto err_alloc; } if (d->status_buf[i] && chip->ack_base) { reg = chip->ack_base + (i * map->reg_stride * d->irq_reg_stride); ret = regmap_write(map, reg, d->status_buf[i] & d->mask_buf[i]); if (ret != 0) { dev_err(map->dev, "Failed to ack 0x%x: %d\n", reg, ret); goto err_alloc; } } } /* Wake is disabled by default */ Loading include/linux/regmap.h +7 −3 Original line number Diff line number Diff line Loading @@ -471,6 +471,9 @@ struct regmap_irq { * @ack_base: Base ack address. If zero then the chip is clear on read. * @wake_base: Base address for wake enables. If zero unsupported. * @irq_reg_stride: Stride to use for chips where registers are not contiguous. * @init_ack_masked: Ack all masked interrupts once during initalization. * @mask_invert: Inverted mask register: cleared bits are masked out. * @wake_invert: Inverted wake register: cleared bits are wake enabled. * @runtime_pm: Hold a runtime PM lock on the device when accessing it. * * @num_regs: Number of registers in each control bank. Loading @@ -486,9 +489,10 @@ struct regmap_irq_chip { unsigned int ack_base; unsigned int wake_base; unsigned int irq_reg_stride; unsigned int mask_invert; unsigned int wake_invert; bool runtime_pm; bool init_ack_masked:1; bool mask_invert:1; bool wake_invert:1; bool runtime_pm:1; int num_regs; Loading Loading
drivers/base/regmap/regmap-irq.c +25 −0 Original line number Diff line number Diff line Loading @@ -418,6 +418,31 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, reg, ret); goto err_alloc; } if (!chip->init_ack_masked) continue; /* Ack masked but set interrupts */ reg = chip->status_base + (i * map->reg_stride * d->irq_reg_stride); ret = regmap_read(map, reg, &d->status_buf[i]); if (ret != 0) { dev_err(map->dev, "Failed to read IRQ status: %d\n", ret); goto err_alloc; } if (d->status_buf[i] && chip->ack_base) { reg = chip->ack_base + (i * map->reg_stride * d->irq_reg_stride); ret = regmap_write(map, reg, d->status_buf[i] & d->mask_buf[i]); if (ret != 0) { dev_err(map->dev, "Failed to ack 0x%x: %d\n", reg, ret); goto err_alloc; } } } /* Wake is disabled by default */ Loading
include/linux/regmap.h +7 −3 Original line number Diff line number Diff line Loading @@ -471,6 +471,9 @@ struct regmap_irq { * @ack_base: Base ack address. If zero then the chip is clear on read. * @wake_base: Base address for wake enables. If zero unsupported. * @irq_reg_stride: Stride to use for chips where registers are not contiguous. * @init_ack_masked: Ack all masked interrupts once during initalization. * @mask_invert: Inverted mask register: cleared bits are masked out. * @wake_invert: Inverted wake register: cleared bits are wake enabled. * @runtime_pm: Hold a runtime PM lock on the device when accessing it. * * @num_regs: Number of registers in each control bank. Loading @@ -486,9 +489,10 @@ struct regmap_irq_chip { unsigned int ack_base; unsigned int wake_base; unsigned int irq_reg_stride; unsigned int mask_invert; unsigned int wake_invert; bool runtime_pm; bool init_ack_masked:1; bool mask_invert:1; bool wake_invert:1; bool runtime_pm:1; int num_regs; Loading