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Commit 178f121d authored by Vijay kumar Tumati's avatar Vijay kumar Tumati
Browse files

msm: camera: Driver changes for new csiphy & csid on 8937 



8937 uses a new version of csiphy & csid. Adding new
configuration file and making necessary driver changes
for that.

Change-Id: Ica45e38ee4e43e4fc2079993610ebb9239ac1f03
Signed-off-by: default avatarVijay kumar Tumati <vtumati@codeaurora.org>
parent ac0c0a37

drivers/media/platform/msm/camera_v2/sensor/csid/include/msm_csid_3_4_2_hwreg.h

0 → 100644
+63 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef MSM_CSID_3_4_2_HWREG_H

#define MSM_CSID_3_4_2_HWREG_H



#include <sensor/csid/msm_csid.h>



uint8_t csid_lane_assign_v3_4_2[PHY_LANE_MAX] = {0, 1, 2, 3, 4};

struct csid_reg_parms_t csid_v3_4_2 = {

	/* MIPI	CSID registers */

	0x0,

	0x4,

	0x8,

	0xC,

	0x10,

	0x14,

	0x18,

	0x1C,

	0x20,

	0x60,

	0x64,

	0x68,

	0x6C,

	0x70,

	0x74,

	0x78,

	0x7C,

	0x80,

	0x84,

	0x88,

	0x8C,

	0x90,

	0x94,

	0x98,

	0xA0,

	0xA4,

	0xAC,

	0xB0,

	0xB4,

	11,

	0x7FFF,

	0x4,

	17,

	0x30040002,

	0xFFFFFFFF,

	0xFFFFFFFF,

	0xFFFFFFFF,

	0x7f010800,

	20,

	0xFFFFFFFF,

	0xFFFFFFFF,

};

#endif

drivers/media/platform/msm/camera_v2/sensor/csid/msm_csid.c

+9 −1
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "include/msm_csid_3_2_hwreg.h"

#include "include/msm_csid_3_5_hwreg.h"

#include "include/msm_csid_3_4_1_hwreg.h"

#include "include/msm_csid_3_4_2_hwreg.h"

#include "include/msm_csid_3_6_0_hwreg.h"

#include "cam_hw_ops.h"
@@ -39,6 +40,7 @@ 
#define CSID_VERSION_V33                      0x30030000

#define CSID_VERSION_V34                      0x30040000

#define CSID_VERSION_V34_1                    0x30040001

#define CSID_VERSION_V34_2                    0x30040002

#define CSID_VERSION_V36                      0x30060000

#define CSID_VERSION_V37                      0x30070000

#define CSID_VERSION_V35                      0x30050000
@@ -1246,6 +1248,12 @@ static int csid_probe(struct platform_device *pdev) 
		new_csid_dev->hw_dts_version = CSID_VERSION_V34_1;

		new_csid_dev->ctrl_reg->csid_lane_assign =

			csid_lane_assign_v3_4_1;

	} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,

		"qcom,csid-v3.4.2")) {

		new_csid_dev->ctrl_reg->csid_reg = csid_v3_4_2;

		new_csid_dev->hw_dts_version = CSID_VERSION_V34_2;

		new_csid_dev->ctrl_reg->csid_lane_assign =

			csid_lane_assign_v3_4_2;

	} else if (of_device_is_compatible(new_csid_dev->pdev->dev.of_node,

		"qcom,csid-v3.6.0")) {

		new_csid_dev->ctrl_reg->csid_reg = csid_v3_6_0;

drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_4_2_hwreg.h

0 → 100644
+93 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef MSM_CSIPHY_3_4_2_HWREG_H

#define MSM_CSIPHY_3_4_2_HWREG_H



#define ULPM_WAKE_UP_TIMER_MODE                   2

#define GLITCH_ELIMINATION_NUM                    0x12 /* bit [6:4] */



#include <sensor/csiphy/msm_csiphy.h>



struct csiphy_reg_parms_t csiphy_v3_4_2 = {

	.mipi_csiphy_interrupt_status0_addr = 0x8B0,

	.mipi_csiphy_interrupt_clear0_addr = 0x858,

	.mipi_csiphy_glbl_irq_cmd_addr = 0x828,

};



struct csiphy_reg_3ph_parms_t csiphy_v3_4_2_3ph = {

	/*MIPI CSI PHY registers*/

	{0x814, 0x0},

	{0x818, 0x1},

	{0x188, 0x7F},

	{0x18C, 0x7F},

	{0x190, 0x0},

	{0x104, 0x6},

	{0x108, 0x0},

	{0x10c, 0x0},

	{0x114, 0x20},

	{0x118, 0x3E},

	{0x11c, 0x41},

	{0x120, 0x41},

	{0x124, 0x7F},

	{0x128, 0x0},

	{0x12c, 0x0},

	{0x130, 0x1},

	{0x134, 0x0},

	{0x138, 0x0},

	{0x13C, 0x10},

	{0x140, 0x1},

	{0x144, GLITCH_ELIMINATION_NUM},

	{0x148, 0xFE},

	{0x14C, 0x1},

	{0x154, 0x0},

	{0x15C, 0x33},

	{0x160, ULPM_WAKE_UP_TIMER_MODE},

	{0x164, 0x48},

	{0x168, 0xA0},

	{0x16C, 0x17},

	{0x170, 0x41},

	{0x174, 0x41},

	{0x178, 0x3E},

	{0x17C, 0x0},

	{0x180, 0x0},

	{0x184, 0x7F},

	{0x1cc, 0x10},

	{0x81c, 0x6},

	{0x82c, 0xFF},

	{0x830, 0xFF},

	{0x834, 0xFB},

	{0x838, 0xFF},

	{0x83c, 0x7F},

	{0x840, 0xFF},

	{0x844, 0xFF},

	{0x848, 0xEF},

	{0x84c, 0xFF},

	{0x850, 0xFF},

	{0x854, 0xFF},

	{0x28, 0x0},

	{0x800, 0x2},

	{0x0, 0x8E},

	{0x4, 0x8},

	{0x8, 0x0},

	{0xC, 0xFF},

	{0x10, 0x56},

	{0x2C, 0x1},

	{0x30, 0x0},

	{0x34, 0x3},

	{0x38, 0xfe},

	{0x3C, 0xB8},

	{0x1C, 0xE7},

	{0x14, 0x0},

	{0x14, 0x60}

};

#endif

drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_3_5_hwreg.h

+1 −0
Original line number Diff line number Diff line
@@ -88,5 +88,6 @@ struct csiphy_reg_3ph_parms_t csiphy_v3_5_3ph = { 
	{0x3C, 0xB8},

	{0x1C, 0xA},

	{0x14, 0x0},

	{0x0, 0x0},

};

#endif

drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c

+55 −10
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include "include/msm_csiphy_3_0_hwreg.h"

#include "include/msm_csiphy_3_1_hwreg.h"

#include "include/msm_csiphy_3_2_hwreg.h"

#include "include/msm_csiphy_3_4_2_hwreg.h"

#include "include/msm_csiphy_3_5_hwreg.h"

#include "cam_hw_ops.h"
@@ -36,6 +37,7 @@ 
#define CSIPHY_VERSION_V30                        0x10

#define CSIPHY_VERSION_V31                        0x31

#define CSIPHY_VERSION_V32                        0x32

#define CSIPHY_VERSION_V342                       0x342

#define CSIPHY_VERSION_V35                        0x35

#define MSM_CSIPHY_DRV_NAME                      "msm_csiphy"

#define CLK_LANE_OFFSET                             1
@@ -44,7 +46,6 @@ 
#define CSI_3PHASE_HW                               1

#define MAX_LANES                                   4

#define CLOCK_OFFSET                              0x700

#define CLK_MISS_TIMER                            0xA5



#undef CDBG

#define CDBG(fmt, args...) pr_debug(fmt, ##args)
@@ -365,7 +366,14 @@ static int msm_csiphy_2phase_lane_config( 
			mipi_csiphy_2ph_lnn_cfg3.addr + offset);



		if (clk_lane == 1) {

			msm_camera_io_w(CLK_MISS_TIMER, csiphybase +

			if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

				msm_camera_io_w(0x80,

					csiphybase +

					csiphy_dev->ctrl_reg->csiphy_3ph_reg.

					mipi_csiphy_2ph_lnn_cfg1.addr + offset);

			}

			msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg4.data, csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg4.addr + offset);

		} else {
@@ -375,20 +383,51 @@ static int msm_csiphy_2phase_lane_config( 
				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg1.addr + offset);

		}

		if (csiphy_dev->hw_version == CSIPHY_VERSION_V342 &&

			csiphy_params->combo_mode == 1) {

			msm_camera_io_w(0x52,

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg5.addr + offset);

		} else {

			msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg5.data,

			csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg5.addr + offset);

		}

		if (clk_lane == 1 &&

			csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

			msm_camera_io_w(0x1f,

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg9.addr + offset);

		} else {

			msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg9.data,

			csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg9.addr + offset);

		}

		msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_2ph_lnn_test_imp.data,

			csiphybase + csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_2ph_lnn_test_imp.addr + offset);

		if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

			msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_ctrl5.data,

				csiphybase +

				csiphy_dev->ctrl_reg->csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_ctrl5.addr + offset);

		}

		mask <<= 1;

	}

	if (csiphy_dev->hw_version == CSIPHY_VERSION_V342) {

		msm_camera_io_w(csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_3ph_cmn_ctrl0.data,

			csiphy_dev->base + csiphy_dev->ctrl_reg->csiphy_3ph_reg.

			mipi_csiphy_3ph_cmn_ctrl0.addr);

	}

	msm_csiphy_cphy_irq_config(csiphy_dev, csiphy_params);

	return 0;

}
@@ -1399,6 +1438,12 @@ static int csiphy_probe(struct platform_device *pdev) 
		"qcom,csiphy-v3.2")) {

		new_csiphy_dev->ctrl_reg->csiphy_reg = csiphy_v3_2;

		new_csiphy_dev->hw_dts_version = CSIPHY_VERSION_V32;

	} else if (of_device_is_compatible(new_csiphy_dev->pdev->dev.of_node,

		"qcom,csiphy-v3.4.2")) {

		new_csiphy_dev->ctrl_reg->csiphy_3ph_reg = csiphy_v3_4_2_3ph;

		new_csiphy_dev->ctrl_reg->csiphy_reg = csiphy_v3_4_2;

		new_csiphy_dev->hw_dts_version = CSIPHY_VERSION_V342;

		new_csiphy_dev->csiphy_3phase = CSI_3PHASE_HW;

	} else if (of_device_is_compatible(new_csiphy_dev->pdev->dev.of_node,

		"qcom,csiphy-v3.5")) {

		new_csiphy_dev->ctrl_reg->csiphy_3ph_reg = csiphy_v3_5_3ph;