Loading arch/arm/boot/dts/qcom/apq8053.dtsi +0 −7 Original line number Diff line number Diff line Loading @@ -52,10 +52,3 @@ &secure_mem { status = "disabled"; }; &clock_gcc { compatible = "qcom,gcc-8953"; reg = <0x1800000 0x80000>, <0x00a4124 0x08>; reg-names = "cc_base", "efuse"; }; arch/arm/boot/dts/qcom/msm8953.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -867,8 +867,9 @@ clock_gcc: qcom,gcc@1800000 { compatible = "qcom,gcc-8953"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; reg = <0x1800000 0x80000>, <0x00a4124 0x08>; reg-names = "cc_base", "efuse"; vdd_dig-supply = <&pm8953_s2_level>; #clock-cells = <1>; }; Loading Loading
arch/arm/boot/dts/qcom/apq8053.dtsi +0 −7 Original line number Diff line number Diff line Loading @@ -52,10 +52,3 @@ &secure_mem { status = "disabled"; }; &clock_gcc { compatible = "qcom,gcc-8953"; reg = <0x1800000 0x80000>, <0x00a4124 0x08>; reg-names = "cc_base", "efuse"; };
arch/arm/boot/dts/qcom/msm8953.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -867,8 +867,9 @@ clock_gcc: qcom,gcc@1800000 { compatible = "qcom,gcc-8953"; reg = <0x1800000 0x80000>; reg-names = "cc_base"; reg = <0x1800000 0x80000>, <0x00a4124 0x08>; reg-names = "cc_base", "efuse"; vdd_dig-supply = <&pm8953_s2_level>; #clock-cells = <1>; }; Loading