Commit 165e901c authored Jun 26, 2013 by Ville Syrjälä Committed by Daniel Vetter Jul 01, 2013

drm/i915: Mask out hardware status bits from VLV DPLL register



The DPLL lock bit, and the DPIO phy status bits are read-only and
controlled by the hardware, so they will never be set by the driver.
Mask them out when reading the hw state, so that the state
comparison won't fail.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
[danvet: Jesse asked for a code comment and I wholeheartly agree, so
added one.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent f6736a1a

drivers/gpu/drm/i915/intel_display.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -4958,6 +4958,11 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
		if (!IS_VALLEYVIEW(dev)) {
		pipe_config->dpll_hw_state.fp0 = I915_READ(FP0(crtc->pipe));
		pipe_config->dpll_hw_state.fp1 = I915_READ(FP1(crtc->pipe));
		} else {
		/* Mask out read-only status bits. */
		pipe_config->dpll_hw_state.dpll &= ~(DPLL_LOCK_VLV \|
		DPLL_PORTC_READY_MASK \|
		DPLL_PORTB_READY_MASK);
		}

		return true;