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Commit 1646df40 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: R2: Fix problem with code that incorrectly modifies ebase.
  MIPS: Change {set,clear,change}_c0_<foo> to return old value.
  MIPS: compat: Remove duplicated #include
  MIPS: VR5500: Enable prefetch
  MIPS: Fix oops in dma_unmap_page on not coherent mips platforms
parents 1b5e62b4 9fb4c2b9
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+11 −11
Original line number Diff line number Diff line
@@ -1391,11 +1391,11 @@ static inline void tlb_write_random(void)
static inline unsigned int					\
set_c0_##name(unsigned int set)					\
{								\
	unsigned int res;					\
	unsigned int res, new;					\
								\
	res = read_c0_##name();					\
	res |= set;						\
	write_c0_##name(res);					\
	new = res | set;					\
	write_c0_##name(new);					\
								\
	return res;						\
}								\
@@ -1403,24 +1403,24 @@ set_c0_##name(unsigned int set) \
static inline unsigned int					\
clear_c0_##name(unsigned int clear)				\
{								\
	unsigned int res;					\
	unsigned int res, new;					\
								\
	res = read_c0_##name();					\
	res &= ~clear;						\
	write_c0_##name(res);					\
	new = res & ~clear;					\
	write_c0_##name(new);					\
								\
	return res;						\
}								\
								\
static inline unsigned int					\
change_c0_##name(unsigned int change, unsigned int new)		\
change_c0_##name(unsigned int change, unsigned int val)		\
{								\
	unsigned int res;					\
	unsigned int res, new;					\
								\
	res = read_c0_##name();					\
	res &= ~change;						\
	res |= (new & change);					\
	write_c0_##name(res);					\
	new = res & ~change;					\
	new |= (val & change);					\
	write_c0_##name(new);					\
								\
	return res;						\
}
+0 −1
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@
#include <linux/module.h>
#include <linux/binfmts.h>
#include <linux/security.h>
#include <linux/syscalls.h>
#include <linux/compat.h>
#include <linux/vfs.h>
#include <linux/ipc.h>
+7 −5
Original line number Diff line number Diff line
@@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void)
#endif /* CONFIG_MIPS_MT_SMTC */

	if (cpu_has_veic || cpu_has_vint) {
		unsigned long sr = set_c0_status(ST0_BEV);
		write_c0_ebase(ebase);
		write_c0_status(sr);
		/* Setting vector spacing enables EI/VI mode  */
		change_c0_intctl(0x3e0, VECTORSPACING);
	}
@@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
#ifdef CONFIG_64BIT
	unsigned long uncached_ebase = TO_UNCAC(ebase);
#endif
	if (cpu_has_mips_r2)
		uncached_ebase += (read_c0_ebase() & 0x3ffff000);

	if (!addr)
		panic(panic_null_cerr);
@@ -1635,9 +1635,11 @@ void __init trap_init(void)
		return;	/* Already done */
#endif

	if (cpu_has_veic || cpu_has_vint)
		ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
	else {
	if (cpu_has_veic || cpu_has_vint) {
		unsigned long size = 0x200 + VECTORSPACING*64;
		ebase = (unsigned long)
			__alloc_bootmem(size, 1 << fls(size), 0);
	} else {
		ebase = CAC_BASE;
		if (cpu_has_mips_r2)
			ebase += (read_c0_ebase() & 0x3ffff000);
+1 −1
Original line number Diff line number Diff line
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
		c->dcache.ways = 2;
		c->dcache.waybit = 0;

		c->options |= MIPS_CPU_CACHE_CDEX_P;
		c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
		break;

	case CPU_TX49XX:
+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
	if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
		unsigned long addr;

		addr = plat_dma_addr_to_phys(dma_address);
		addr = dma_addr_to_virt(dma_address);
		dma_cache_wback_inv(addr, size);
	}