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Commit 1538a9e0 authored by Michel Dänzer's avatar Michel Dänzer Committed by Alex Deucher
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drm/radeon: Only flush HDP cache for indirect buffers from userspace



It isn't necessary for command streams generated by the kernel (at least
not while we aren't storing ring or indirect buffers in VRAM).

Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 701e1e78
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+4 −4
Original line number Diff line number Diff line
@@ -3801,7 +3801,7 @@ int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
	radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
	radeon_ring_write(ring, ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2));
	radeon_ring_write(ring, 0xDEADBEEF);
	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	for (i = 0; i < rdev->usec_timeout; i++) {
		tmp = RREG32(scratch);
@@ -4004,7 +4004,7 @@ int cik_copy_cpdma(struct radeon_device *rdev,
		return r;
	}

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);
	radeon_semaphore_free(rdev, &sem, *fence);

	return r;
@@ -4103,7 +4103,7 @@ int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
	ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2);
	ib.ptr[2] = 0xDEADBEEF;
	ib.length_dw = 3;
	r = radeon_ib_schedule(rdev, &ib, NULL);
	r = radeon_ib_schedule(rdev, &ib, NULL, false);
	if (r) {
		radeon_scratch_free(rdev, scratch);
		radeon_ib_free(rdev, &ib);
@@ -4324,7 +4324,7 @@ static int cik_cp_gfx_start(struct radeon_device *rdev)
	radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */
	radeon_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	return 0;
}
+3 −3
Original line number Diff line number Diff line
@@ -596,7 +596,7 @@ int cik_copy_dma(struct radeon_device *rdev,
		return r;
	}

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);
	radeon_semaphore_free(rdev, &sem, *fence);

	return r;
@@ -638,7 +638,7 @@ int cik_sdma_ring_test(struct radeon_device *rdev,
	radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr));
	radeon_ring_write(ring, 1); /* number of DWs to follow */
	radeon_ring_write(ring, 0xDEADBEEF);
	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	for (i = 0; i < rdev->usec_timeout; i++) {
		tmp = readl(ptr);
@@ -695,7 +695,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
	ib.ptr[4] = 0xDEADBEEF;
	ib.length_dw = 5;

	r = radeon_ib_schedule(rdev, &ib, NULL);
	r = radeon_ib_schedule(rdev, &ib, NULL, false);
	if (r) {
		radeon_ib_free(rdev, &ib);
		DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
+2 −2
Original line number Diff line number Diff line
@@ -2869,7 +2869,7 @@ static int evergreen_cp_start(struct radeon_device *rdev)
	radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
	radeon_ring_write(ring, 0);
	radeon_ring_write(ring, 0);
	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	cp_me = 0xff;
	WREG32(CP_ME_CNTL, cp_me);
@@ -2912,7 +2912,7 @@ static int evergreen_cp_start(struct radeon_device *rdev)
	radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */
	radeon_ring_write(ring, 0x00000010); /*  */

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	return 0;
}
+1 −1
Original line number Diff line number Diff line
@@ -155,7 +155,7 @@ int evergreen_copy_dma(struct radeon_device *rdev,
		return r;
	}

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);
	radeon_semaphore_free(rdev, &sem, *fence);

	return r;
+2 −2
Original line number Diff line number Diff line
@@ -1505,7 +1505,7 @@ static int cayman_cp_start(struct radeon_device *rdev)
	radeon_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
	radeon_ring_write(ring, 0);
	radeon_ring_write(ring, 0);
	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	cayman_cp_enable(rdev, true);

@@ -1547,7 +1547,7 @@ static int cayman_cp_start(struct radeon_device *rdev)
	radeon_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */
	radeon_ring_write(ring, 0x00000010); /*  */

	radeon_ring_unlock_commit(rdev, ring);
	radeon_ring_unlock_commit(rdev, ring, false);

	/* XXX init other rings */

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