Loading arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -488,7 +488,7 @@ config ARCH_PXA Support for Intel/Marvell's PXA2xx/PXA3xx processor line. config ARCH_MMP bool "Marvell PXA168" bool "Marvell PXA168/910" depends on MMU select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB Loading @@ -499,7 +499,7 @@ config ARCH_MMP select TICK_ONESHOT select PLAT_PXA help Support for Marvell's PXA168 processor line. Support for Marvell's PXA168/910 processor line. config ARCH_RPC bool "RiscPC" Loading arch/arm/mach-mmp/Kconfig +7 −1 Original line number Diff line number Diff line if ARCH_MMP menu "Marvell PXA168 Implmentations" menu "Marvell PXA168/910 Implmentations" config MACH_ASPENITE bool "Marvell's PXA168 Aspenite Development Board" Loading @@ -24,4 +24,10 @@ config CPU_PXA168 help Select code specific to PXA168 config CPU_PXA910 bool select CPU_MOHAWK help Select code specific to PXA910 endif arch/arm/mach-mmp/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ obj-y += common.o clock.o devices.o irq.o time.o # SoC support obj-$(CONFIG_CPU_PXA168) += pxa168.o obj-$(CONFIG_CPU_PXA910) += pxa910.o # board support obj-$(CONFIG_MACH_ASPENITE) += aspenite.o Loading arch/arm/mach-mmp/common.h +2 −0 Original line number Diff line number Diff line Loading @@ -5,7 +5,9 @@ struct sys_timer; extern void timer_init(int irq); extern struct sys_timer pxa168_timer; extern struct sys_timer pxa910_timer; extern void __init pxa168_init_irq(void); extern void __init pxa910_init_irq(void); extern void __init icu_init_irq(void); extern void __init pxa_map_io(void); arch/arm/mach-mmp/include/mach/cputype.h +9 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ * CPU Stepping OLD_ID CPU_ID CHIP_ID * * PXA168 A0 0x41159263 0x56158400 0x00A0A333 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910 */ #ifdef CONFIG_CPU_PXA168 Loading @@ -16,6 +17,14 @@ # define __cpu_is_pxa168(id) (0) #endif #ifdef CONFIG_CPU_PXA910 # define __cpu_is_pxa910(id) \ ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; }) #else # define __cpu_is_pxa910(id) (0) #endif #define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); }) #define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); }) #endif /* __ASM_MACH_CPUTYPE_H */ Loading
arch/arm/Kconfig +2 −2 Original line number Diff line number Diff line Loading @@ -488,7 +488,7 @@ config ARCH_PXA Support for Intel/Marvell's PXA2xx/PXA3xx processor line. config ARCH_MMP bool "Marvell PXA168" bool "Marvell PXA168/910" depends on MMU select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB Loading @@ -499,7 +499,7 @@ config ARCH_MMP select TICK_ONESHOT select PLAT_PXA help Support for Marvell's PXA168 processor line. Support for Marvell's PXA168/910 processor line. config ARCH_RPC bool "RiscPC" Loading
arch/arm/mach-mmp/Kconfig +7 −1 Original line number Diff line number Diff line if ARCH_MMP menu "Marvell PXA168 Implmentations" menu "Marvell PXA168/910 Implmentations" config MACH_ASPENITE bool "Marvell's PXA168 Aspenite Development Board" Loading @@ -24,4 +24,10 @@ config CPU_PXA168 help Select code specific to PXA168 config CPU_PXA910 bool select CPU_MOHAWK help Select code specific to PXA910 endif
arch/arm/mach-mmp/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ obj-y += common.o clock.o devices.o irq.o time.o # SoC support obj-$(CONFIG_CPU_PXA168) += pxa168.o obj-$(CONFIG_CPU_PXA910) += pxa910.o # board support obj-$(CONFIG_MACH_ASPENITE) += aspenite.o Loading
arch/arm/mach-mmp/common.h +2 −0 Original line number Diff line number Diff line Loading @@ -5,7 +5,9 @@ struct sys_timer; extern void timer_init(int irq); extern struct sys_timer pxa168_timer; extern struct sys_timer pxa910_timer; extern void __init pxa168_init_irq(void); extern void __init pxa910_init_irq(void); extern void __init icu_init_irq(void); extern void __init pxa_map_io(void);
arch/arm/mach-mmp/include/mach/cputype.h +9 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ * CPU Stepping OLD_ID CPU_ID CHIP_ID * * PXA168 A0 0x41159263 0x56158400 0x00A0A333 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910 */ #ifdef CONFIG_CPU_PXA168 Loading @@ -16,6 +17,14 @@ # define __cpu_is_pxa168(id) (0) #endif #ifdef CONFIG_CPU_PXA910 # define __cpu_is_pxa910(id) \ ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; }) #else # define __cpu_is_pxa910(id) (0) #endif #define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); }) #define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); }) #endif /* __ASM_MACH_CPUTYPE_H */