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Commit 148b00b6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/signal32: Fix sigset_t conversion when copying to user
  powerpc: Fix atomic_xxx_return barrier semantics
  powerpc: Remove buggy 9-year-old test for binutils < 2.12.1
  powerpc/book3e-64: Fix debug support for userspace
  powerpc: Remove extraneous CONFIG_PPC_ADV_DEBUG_REGS define
  powerpc: Revert show_regs() define for readability
  powerpc/ps3: Fix SMP lockdep boot warning
  powerpc/ps3: Fix lost SMP IPIs
  powerpc: Add hvcall.h include to book3s_hv.c
  powerpc/trace: Add a dummy stack frame for trace_hardirqs_off
  powerpc: Copy down exception vectors after feature fixups
  powerpc: panic if we can't instantiate RTAS
  powerpc/4xx: Fix typos in kexec config dependencies
  powerpc/fsl: MCU_MPC8349EMITX wants I2C built-in, modular won't do...
  powerpc/fsl_udc_core: Fix dumb typo
  carma-fpga: Missed switch from of_register_platform_driver()
  powerpc: Fix build breakage in jump_label.c
parents e36d5058 a313f4c5

arch/powerpc/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -345,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE 


config KEXEC

	bool "kexec system call (EXPERIMENTAL)"

	depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !47x)) && EXPERIMENTAL

	depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !PPC_47x)) && EXPERIMENTAL

	help

	  kexec is a system call that implements the ability to shutdown your

	  current kernel, and to start another kernel.  It is like a reboot

arch/powerpc/Makefile

+0 −6
Original line number Diff line number Diff line
@@ -255,12 +255,6 @@ checkbin: 
		echo 'disable kernel modules' ; \

		false ; \

	fi

	@if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \

		echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \

		echo 'correctly with old versions of binutils.' ; \

		echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \

		false ; \

	fi



CLEAN_FILES += $(TOUT)

arch/powerpc/include/asm/atomic.h

+24 −24
Original line number Diff line number Diff line
@@ -49,13 +49,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v) 
	int t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%2		# atomic_add_return\n\

	add	%0,%1,%0\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%0,0,%2 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (a), "r" (&v->counter)

	: "cc", "memory");
@@ -85,13 +85,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v) 
	int t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%2		# atomic_sub_return\n\

	subf	%0,%1,%0\n"

	PPC405_ERR77(0,%2)

"	stwcx.	%0,0,%2 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (a), "r" (&v->counter)

	: "cc", "memory");
@@ -119,13 +119,13 @@ static __inline__ int atomic_inc_return(atomic_t *v) 
	int t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%1		# atomic_inc_return\n\

	addic	%0,%0,1\n"

	PPC405_ERR77(0,%1)

"	stwcx.	%0,0,%1 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (&v->counter)

	: "cc", "xer", "memory");
@@ -163,13 +163,13 @@ static __inline__ int atomic_dec_return(atomic_t *v) 
	int t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%1		# atomic_dec_return\n\

	addic	%0,%0,-1\n"

	PPC405_ERR77(0,%1)

"	stwcx.	%0,0,%1\n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (&v->counter)

	: "cc", "xer", "memory");
@@ -194,7 +194,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) 
	int t;



	__asm__ __volatile__ (

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%1		# __atomic_add_unless\n\

	cmpw	0,%0,%3 \n\

	beq-	2f \n\
@@ -202,7 +202,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) 
	PPC405_ERR77(0,%2)

"	stwcx.	%0,0,%1 \n\

	bne-	1b \n"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

"	subf	%0,%2,%0 \n\

2:"

	: "=&r" (t)
@@ -226,7 +226,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v) 
	int t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	lwarx	%0,0,%1		# atomic_dec_if_positive\n\

	cmpwi	%0,1\n\

	addi	%0,%0,-1\n\
@@ -234,7 +234,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v) 
	PPC405_ERR77(0,%1)

"	stwcx.	%0,0,%1\n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	"\n\

2:"	: "=&b" (t)

	: "r" (&v->counter)
@@ -285,12 +285,12 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v) 
	long t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%2		# atomic64_add_return\n\

	add	%0,%1,%0\n\

	stdcx.	%0,0,%2 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (a), "r" (&v->counter)

	: "cc", "memory");
@@ -319,12 +319,12 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v) 
	long t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%2		# atomic64_sub_return\n\

	subf	%0,%1,%0\n\

	stdcx.	%0,0,%2 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (a), "r" (&v->counter)

	: "cc", "memory");
@@ -351,12 +351,12 @@ static __inline__ long atomic64_inc_return(atomic64_t *v) 
	long t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%1		# atomic64_inc_return\n\

	addic	%0,%0,1\n\

	stdcx.	%0,0,%1 \n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (&v->counter)

	: "cc", "xer", "memory");
@@ -393,12 +393,12 @@ static __inline__ long atomic64_dec_return(atomic64_t *v) 
	long t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%1		# atomic64_dec_return\n\

	addic	%0,%0,-1\n\

	stdcx.	%0,0,%1\n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	: "=&r" (t)

	: "r" (&v->counter)

	: "cc", "xer", "memory");
@@ -418,13 +418,13 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v) 
	long t;



	__asm__ __volatile__(

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%1		# atomic64_dec_if_positive\n\

	addic.	%0,%0,-1\n\

	blt-	2f\n\

	stdcx.	%0,0,%1\n\

	bne-	1b"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

	"\n\

2:"	: "=&r" (t)

	: "r" (&v->counter)
@@ -450,14 +450,14 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) 
	long t;



	__asm__ __volatile__ (

	PPC_RELEASE_BARRIER

	PPC_ATOMIC_ENTRY_BARRIER

"1:	ldarx	%0,0,%1		# __atomic_add_unless\n\

	cmpd	0,%0,%3 \n\

	beq-	2f \n\

	add	%0,%2,%0 \n"

"	stdcx.	%0,0,%1 \n\

	bne-	1b \n"

	PPC_ACQUIRE_BARRIER

	PPC_ATOMIC_EXIT_BARRIER

"	subf	%0,%2,%0 \n\

2:"

	: "=&r" (t)

arch/powerpc/include/asm/bitops.h

+6 −6
Original line number Diff line number Diff line
@@ -124,14 +124,14 @@ static __inline__ unsigned long fn( \ 
	return (old & mask);				\

}



DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER,

	      PPC_ACQUIRE_BARRIER, 0)

DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,

	      PPC_ATOMIC_EXIT_BARRIER, 0)

DEFINE_TESTOP(test_and_set_bits_lock, or, "",

	      PPC_ACQUIRE_BARRIER, 1)

DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER,

	      PPC_ACQUIRE_BARRIER, 0)

DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER,

	      PPC_ACQUIRE_BARRIER, 0)

DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,

	      PPC_ATOMIC_EXIT_BARRIER, 0)

DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,

	      PPC_ATOMIC_EXIT_BARRIER, 0)



static __inline__ int test_and_set_bit(unsigned long nr,

				       volatile unsigned long *addr)

arch/powerpc/include/asm/futex.h

+4 −3
Original line number Diff line number Diff line
@@ -11,12 +11,13 @@ 


#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \

  __asm__ __volatile ( \

	PPC_RELEASE_BARRIER \

	PPC_ATOMIC_ENTRY_BARRIER \

"1:	lwarx	%0,0,%2\n" \

	insn \

	PPC405_ERR77(0, %2) \

"2:	stwcx.	%1,0,%2\n" \

	"bne-	1b\n" \

	PPC_ATOMIC_EXIT_BARRIER \

	"li	%1,0\n" \

"3:	.section .fixup,\"ax\"\n" \

"4:	li	%1,%3\n" \
@@ -92,14 +93,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 
		return -EFAULT;



        __asm__ __volatile__ (

        PPC_RELEASE_BARRIER

        PPC_ATOMIC_ENTRY_BARRIER

"1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\

        cmpw    0,%1,%4\n\

        bne-    3f\n"

        PPC405_ERR77(0,%3)

"2:     stwcx.  %5,0,%3\n\

        bne-    1b\n"

        PPC_ACQUIRE_BARRIER

        PPC_ATOMIC_EXIT_BARRIER

"3:	.section .fixup,\"ax\"\n\

4:	li	%0,%6\n\

	b	3b\n\