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Commit 13ce3e99 authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
Browse files

ath9k_hw: add initvals for the AR9003 hardware family 



The AR9003 hardware family now initializes hardware by block
components and into stages: pre, core and init.

Signed-off-by: default avatarLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent af01c04e

drivers/net/wireless/ath/ath9k/ar9003_initvals.h

0 → 100644
+1793 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/net/wireless/ath/ath9k/hw.c

+73 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include "ar5008_initvals.h"

#include "ar9001_initvals.h"

#include "ar9002_initvals.h"

#include "ar9003_initvals.h"



#define ATH9K_CLOCK_RATE_CCK		22

#define ATH9K_CLOCK_RATE_5GHZ_OFDM	40
@@ -813,6 +814,77 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah) 
	}

}



/* AR9003 2.0 - new INI format (pre, core, post arrays per subsystem) */

static void ar9003_hw_init_mode_regs(struct ath_hw *ah)

{

	/* mac */

	INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);

	INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],

		       ar9300_2p0_mac_core,

		       ARRAY_SIZE(ar9300_2p0_mac_core), 2);

	INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],

		       ar9300_2p0_mac_postamble,

		       ARRAY_SIZE(ar9300_2p0_mac_postamble), 5);



	/* bb */

	INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);

	INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],

		       ar9300_2p0_baseband_core,

		       ARRAY_SIZE(ar9300_2p0_baseband_core), 2);

	INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],

		       ar9300_2p0_baseband_postamble,

		       ARRAY_SIZE(ar9300_2p0_baseband_postamble), 5);



	/* radio */

	INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);

	INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],

		       ar9300_2p0_radio_core,

		       ARRAY_SIZE(ar9300_2p0_radio_core), 2);

	INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],

		       ar9300_2p0_radio_postamble,

		       ARRAY_SIZE(ar9300_2p0_radio_postamble), 5);



	/* soc */

	INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],

		       ar9300_2p0_soc_preamble,

		       ARRAY_SIZE(ar9300_2p0_soc_preamble), 2);

	INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);

	INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],

		       ar9300_2p0_soc_postamble,

		       ARRAY_SIZE(ar9300_2p0_soc_postamble), 5);



	/* rx/tx gain */

	INIT_INI_ARRAY(&ah->iniModesRxGain,

		       ar9300Common_rx_gain_table_2p0,

		       ARRAY_SIZE(ar9300Common_rx_gain_table_2p0), 2);

	INIT_INI_ARRAY(&ah->iniModesTxGain,

		       ar9300Modes_lowest_ob_db_tx_gain_table_2p0,

		       ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p0),

		       5);



	/* Load PCIE SERDES settings from INI */



	/* Awake Setting */



	INIT_INI_ARRAY(&ah->iniPcieSerdes,

		       ar9300PciePhy_pll_on_clkreq_disable_L1_2p0,

		       ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0),

		       2);



	/* Sleep Setting */



	INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,

		       ar9300PciePhy_clkreq_enable_L1_2p0,

		       ARRAY_SIZE(ar9300PciePhy_clkreq_enable_L1_2p0),

		       2);



	/* Fast clock modal settings */

	INIT_INI_ARRAY(&ah->iniModesAdditional,

		       ar9300Modes_fast_clock_2p0,

		       ARRAY_SIZE(ar9300Modes_fast_clock_2p0),

		       3);

}



static void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)

{

	if (AR_SREV_9287_11_OR_LATER(ah))
@@ -3581,6 +3653,7 @@ static void ar9003_hw_attach_ops(struct ath_hw *ah) 
{

	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);



	priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;

	priv_ops->macversion_supported = ar9003_hw_macversion_supported;



	ar9003_hw_attach_phy_ops(ah);

drivers/net/wireless/ath/ath9k/hw.h

+13 −0
Original line number Diff line number Diff line
@@ -139,6 +139,13 @@ 
#define ATH9K_HW_RX_HP_QDEPTH	16

#define ATH9K_HW_RX_LP_QDEPTH	128



enum ath_ini_subsys {

	ATH_INI_PRE = 0,

	ATH_INI_CORE,

	ATH_INI_POST,

	ATH_INI_NUM_SPLIT,

};



enum wireless_mode {

	ATH9K_MODE_11A = 0,

	ATH9K_MODE_11G,
@@ -668,6 +675,7 @@ struct ath_hw { 
	struct ar5416IniArray iniBank7;

	struct ar5416IniArray iniAddac;

	struct ar5416IniArray iniPcieSerdes;

	struct ar5416IniArray iniPcieSerdesLowPower;

	struct ar5416IniArray iniModesAdditional;

	struct ar5416IniArray iniModesRxGain;

	struct ar5416IniArray iniModesTxGain;
@@ -680,6 +688,11 @@ struct ath_hw { 
	struct ar5416IniArray iniModes_high_power_tx_gain_9271;

	struct ar5416IniArray iniModes_normal_power_tx_gain_9271;



	struct ar5416IniArray iniMac[ATH_INI_NUM_SPLIT];

	struct ar5416IniArray iniBB[ATH_INI_NUM_SPLIT];

	struct ar5416IniArray iniRadio[ATH_INI_NUM_SPLIT];

	struct ar5416IniArray iniSOC[ATH_INI_NUM_SPLIT];



	u32 intr_gen_timer_trigger;

	u32 intr_gen_timer_thresh;

	struct ath_gen_timer_table hw_gen_timers;