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Commit 13be9f00 authored by Sascha Hauer's avatar Sascha Hauer
Browse files

ARM i.MX28: fix bit operation



reg | (1 << clk->enable_shift) always evaluates to true. Switch it
to & which makes much more sense

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Acked-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent c56eb8fb
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+1 −1
Original line number Diff line number Diff line
@@ -355,7 +355,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
	} else {							\
		reg &= ~BM_CLKCTRL_##dr##_DIV;				\
		reg |= div << BP_CLKCTRL_##dr##_DIV;			\
		if (reg | (1 << clk->enable_shift)) {			\
		if (reg & (1 << clk->enable_shift)) {			\
			pr_err("%s: clock is gated\n", __func__);	\
			return -EINVAL;					\
		}							\