Loading Documentation/devicetree/bindings/net/can/k61-can.txt +9 −2 Original line number Diff line number Diff line Loading @@ -3,15 +3,20 @@ This driver implements SPI slave protocol for Freescale K61 CAN controller. Required properties: - compatible: Should be "fsl,k61". - compatible: Should be "fsl,k61" or "nxp,mpc5746c". - reg: Should contain SPI chip select. - interrupt-parent: Should specify interrupt controller for the interrupt. - interrupts: Should contain IRQ line for the CAN controller. Optional properties: - reset-gpio: Reference to the GPIO connected to the reset input. - pinctrl-names : Names corresponding to the numbered pinctrl states. - pinctrl-0 : This explains the active state of the GPIO line. - pinctrl-1 : This explains the suspend state of the GPIO line. - bits-per-word: Indicate how many bits are in a SPI frame. e.g.: 8, 16, 32. Default to 16. - reset-delay-msec: Delay in milliseconds to be applied after resetting the chip. Default to 1 ms. Example: Loading @@ -24,4 +29,6 @@ Example: pinctrl-names = "active", "sleep"; pinctrl-0 = <&can_rst_on>; pinctrl-1 = <&can_rst_off>; bits-per-word = <8>; reset-delay-msec = <100>; }; arch/arm/boot/dts/qcom/mdm9650-ccard.dtsi +44 −15 Original line number Diff line number Diff line Loading @@ -149,7 +149,7 @@ &tlmm_pinmux { /* Set these up as hogs */ pinctrl-names = "default"; pinctrl-0 = <&can_reset_gpio>, <&ant_switch_gpio1>, <&ant_switch_gpio2>, pinctrl-0 = <&ant_switch_gpio1>, <&ant_switch_gpio2>, <&ant_switch_gpio3>, <ð_can_supply_gpio>, <&oabr_enable_gpio>; Loading Loading @@ -180,20 +180,6 @@ }; }; can_reset_gpio: can_reset_gpio { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; output-high; bias-pull-up; }; }; oabr_enable_gpio: oabr_enable_gpio { mux { pins = "gpio29"; Loading Loading @@ -420,6 +406,35 @@ }; }; }; can_reset { can_rst_on: rst_on { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; /* 2 mA */ bias-pull-up; }; }; can_rst_off: rst_off { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; /* 2 mA */ bias-pull-up; output-high; }; }; }; }; &cnss_pcie { Loading Loading @@ -494,6 +509,20 @@ &spi_4 { status = "ok"; /delete-property/ qcom,use-bam; can-controller@0 { compatible = "nxp,mpc5746c"; reg = <0>; spi-max-frequency = <9600000>; interrupt-parent = <&tlmm_pinmux>; interrupts = <87 0>; reset-gpio = <&tlmm_pinmux 89 0x1>; bits-per-word = <8>; reset-delay-msec = <100>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&can_rst_on>; pinctrl-1 = <&can_rst_off>; }; }; &usb3 { Loading drivers/net/can/spi/k61.c +27 −18 Original line number Diff line number Diff line Loading @@ -57,6 +57,8 @@ struct k61_can { int reset; int wait_cmd; int cmd_result; int bits_per_word; int reset_delay_msec; }; struct k61_netdev_privdata { Loading Loading @@ -309,7 +311,7 @@ static int k61_do_spi_transaction(struct k61_can *priv_data) xfer->tx_buf = priv_data->tx_buf; xfer->rx_buf = priv_data->rx_buf; xfer->len = XFER_BUFFER_SIZE; xfer->bits_per_word = 16; xfer->bits_per_word = priv_data->bits_per_word; ret = spi_sync(spi, msg); LOGDI("spi_sync ret %d\n", ret); Loading Loading @@ -828,25 +830,31 @@ static int k61_probe(struct spi_device *spi) } dev_dbg(dev, "k61_probe created priv_data"); err = of_property_read_u32(spi->dev.of_node, "bits-per-word", &priv_data->bits_per_word); if (err) priv_data->bits_per_word = 16; err = of_property_read_u32(spi->dev.of_node, "reset-delay-msec", &priv_data->reset_delay_msec); if (err) priv_data->reset_delay_msec = 1; priv_data->reset = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); if (!gpio_is_valid(priv_data->reset)) { dev_err(&spi->dev, "Missing dt property: reset-gpio\n"); return -EINVAL; } if (gpio_is_valid(priv_data->reset)) { err = gpio_request(priv_data->reset, "k61-reset"); if (err < 0) { dev_err(&spi->dev, "failed to request gpio %d: %d\n", priv_data->reset, err); goto cleanup_candev; } gpio_direction_output(priv_data->reset, 0); udelay(1); gpio_direction_output(priv_data->reset, 1); /* Provide a delay of 300us for the chip to reset. This is part of * the reset sequence. */ usleep_range(300, 301); msleep(priv_data->reset_delay_msec); } err = k61_create_netdev(spi, priv_data); if (err) { Loading Loading @@ -908,6 +916,7 @@ static int k61_remove(struct spi_device *spi) static const struct of_device_id k61_match_table[] = { { .compatible = "fsl,k61" }, { .compatible = "nxp,mpc5746c" }, { } }; Loading Loading
Documentation/devicetree/bindings/net/can/k61-can.txt +9 −2 Original line number Diff line number Diff line Loading @@ -3,15 +3,20 @@ This driver implements SPI slave protocol for Freescale K61 CAN controller. Required properties: - compatible: Should be "fsl,k61". - compatible: Should be "fsl,k61" or "nxp,mpc5746c". - reg: Should contain SPI chip select. - interrupt-parent: Should specify interrupt controller for the interrupt. - interrupts: Should contain IRQ line for the CAN controller. Optional properties: - reset-gpio: Reference to the GPIO connected to the reset input. - pinctrl-names : Names corresponding to the numbered pinctrl states. - pinctrl-0 : This explains the active state of the GPIO line. - pinctrl-1 : This explains the suspend state of the GPIO line. - bits-per-word: Indicate how many bits are in a SPI frame. e.g.: 8, 16, 32. Default to 16. - reset-delay-msec: Delay in milliseconds to be applied after resetting the chip. Default to 1 ms. Example: Loading @@ -24,4 +29,6 @@ Example: pinctrl-names = "active", "sleep"; pinctrl-0 = <&can_rst_on>; pinctrl-1 = <&can_rst_off>; bits-per-word = <8>; reset-delay-msec = <100>; };
arch/arm/boot/dts/qcom/mdm9650-ccard.dtsi +44 −15 Original line number Diff line number Diff line Loading @@ -149,7 +149,7 @@ &tlmm_pinmux { /* Set these up as hogs */ pinctrl-names = "default"; pinctrl-0 = <&can_reset_gpio>, <&ant_switch_gpio1>, <&ant_switch_gpio2>, pinctrl-0 = <&ant_switch_gpio1>, <&ant_switch_gpio2>, <&ant_switch_gpio3>, <ð_can_supply_gpio>, <&oabr_enable_gpio>; Loading Loading @@ -180,20 +180,6 @@ }; }; can_reset_gpio: can_reset_gpio { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; output-high; bias-pull-up; }; }; oabr_enable_gpio: oabr_enable_gpio { mux { pins = "gpio29"; Loading Loading @@ -420,6 +406,35 @@ }; }; }; can_reset { can_rst_on: rst_on { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; /* 2 mA */ bias-pull-up; }; }; can_rst_off: rst_off { mux { pins = "gpio89"; function = "gpio"; }; config { pins = "gpio89"; drive-strength = <2>; /* 2 mA */ bias-pull-up; output-high; }; }; }; }; &cnss_pcie { Loading Loading @@ -494,6 +509,20 @@ &spi_4 { status = "ok"; /delete-property/ qcom,use-bam; can-controller@0 { compatible = "nxp,mpc5746c"; reg = <0>; spi-max-frequency = <9600000>; interrupt-parent = <&tlmm_pinmux>; interrupts = <87 0>; reset-gpio = <&tlmm_pinmux 89 0x1>; bits-per-word = <8>; reset-delay-msec = <100>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&can_rst_on>; pinctrl-1 = <&can_rst_off>; }; }; &usb3 { Loading
drivers/net/can/spi/k61.c +27 −18 Original line number Diff line number Diff line Loading @@ -57,6 +57,8 @@ struct k61_can { int reset; int wait_cmd; int cmd_result; int bits_per_word; int reset_delay_msec; }; struct k61_netdev_privdata { Loading Loading @@ -309,7 +311,7 @@ static int k61_do_spi_transaction(struct k61_can *priv_data) xfer->tx_buf = priv_data->tx_buf; xfer->rx_buf = priv_data->rx_buf; xfer->len = XFER_BUFFER_SIZE; xfer->bits_per_word = 16; xfer->bits_per_word = priv_data->bits_per_word; ret = spi_sync(spi, msg); LOGDI("spi_sync ret %d\n", ret); Loading Loading @@ -828,25 +830,31 @@ static int k61_probe(struct spi_device *spi) } dev_dbg(dev, "k61_probe created priv_data"); err = of_property_read_u32(spi->dev.of_node, "bits-per-word", &priv_data->bits_per_word); if (err) priv_data->bits_per_word = 16; err = of_property_read_u32(spi->dev.of_node, "reset-delay-msec", &priv_data->reset_delay_msec); if (err) priv_data->reset_delay_msec = 1; priv_data->reset = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0); if (!gpio_is_valid(priv_data->reset)) { dev_err(&spi->dev, "Missing dt property: reset-gpio\n"); return -EINVAL; } if (gpio_is_valid(priv_data->reset)) { err = gpio_request(priv_data->reset, "k61-reset"); if (err < 0) { dev_err(&spi->dev, "failed to request gpio %d: %d\n", priv_data->reset, err); goto cleanup_candev; } gpio_direction_output(priv_data->reset, 0); udelay(1); gpio_direction_output(priv_data->reset, 1); /* Provide a delay of 300us for the chip to reset. This is part of * the reset sequence. */ usleep_range(300, 301); msleep(priv_data->reset_delay_msec); } err = k61_create_netdev(spi, priv_data); if (err) { Loading Loading @@ -908,6 +916,7 @@ static int k61_remove(struct spi_device *spi) static const struct of_device_id k61_match_table[] = { { .compatible = "fsl,k61" }, { .compatible = "nxp,mpc5746c" }, { } }; Loading