Merge commit 'kumar/kumar-next'

* Freescale 83xx and 512x PCI bridges

Freescale 83xx and 512x SOCs include the same pci bridge core.

83xx/512x specific notes:

- reg: should contain two address length tuples

    The first is for the internal pci bridge registers

    The second is for the pci config space access registers

Example (MPC8313ERDB)

	pci0: pci@e0008500 {

		cell-index = <1>;

		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;

		interrupt-map = <

				/* IDSEL 0x0E -mini PCI */

				 0x7000 0x0 0x0 0x1 &ipic 18 0x8

				 0x7000 0x0 0x0 0x2 &ipic 18 0x8

				 0x7000 0x0 0x0 0x3 &ipic 18 0x8

				 0x7000 0x0 0x0 0x4 &ipic 18 0x8

				/* IDSEL 0x0F - PCI slot */

				 0x7800 0x0 0x0 0x1 &ipic 17 0x8

				 0x7800 0x0 0x0 0x2 &ipic 18 0x8

				 0x7800 0x0 0x0 0x3 &ipic 17 0x8

				 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;

		interrupt-parent = <&ipic>;

		interrupts = <66 0x8>;

		bus-range = <0x0 0x0>;

		ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000

			  0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000

			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;

		clock-frequency = <66666666>;

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		reg = <0xe0008500 0x100		/* internal registers */

		       0xe0008300 0x8>;		/* config space access registers */

		compatible = "fsl,mpc8349-pci";

		device_type = "pci";

	};

        - compatible        : compatible list, contains 2 entries, first is

			 "fsl,CHIP-dma-channel", where CHIP is the processor

			 (mpc8349, mpc8350, etc.) and the second is

			 "fsl,elo-dma-channel"

			 "fsl,elo-dma-channel". However, see note below.

        - reg               : <registers mapping for channel>

        - cell-index        : dma channel index starts at 0.

        - compatible        : compatible list, contains 2 entries, first is

			 "fsl,CHIP-dma-channel", where CHIP is the processor

			 (mpc8540, mpc8560, etc.) and the second is

			 "fsl,eloplus-dma-channel"

			 "fsl,eloplus-dma-channel". However, see note below.

        - cell-index        : dma channel index starts at 0.

        - reg               : <registers mapping for channel>

        - interrupts        : <interrupt mapping for DMA channel IRQ>

			interrupts = <17 2>;

		};

	};

Note on DMA channel compatible properties: The compatible property must say

"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA

driver (fsldma).  Any DMA channel used by fsldma cannot be used by another

DMA driver, such as the SSI sound drivers for the MPC8610.  Therefore, any DMA

channel that should be used for another driver should not use

"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel".  For the SSI drivers, for

example, the compatible property should be "fsl,ssi-dma-channel".  See ssi.txt

for more information.

		    "rj-master" - r.j., SSI is clock master

		    "ac97-slave" - AC97 mode, SSI is clock slave

		    "ac97-master" - AC97 mode, SSI is clock master

- fsl,playback-dma: phandle to a DMA node for the DMA channel to use for

- fsl,playback-dma: phandle to a node for the DMA channel to use for

                    playback of audio.  This is typically dictated by SOC

                    design.  See the notes below.

- fsl,capture-dma:  phandle to a DMA node for the DMA channel to use for

- fsl,capture-dma:  phandle to a node for the DMA channel to use for

                    capture (recording) of audio.  This is typically dictated

                    by SOC design.  See the notes below.

playback and DMA channel 3 for capture.  The developer can choose which

DMA controller to use, but the channels themselves are hard-wired.  The

purpose of these two properties is to represent this hardware design.

The device tree nodes for the DMA channels that are referenced by

"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with

"fsl,ssi-dma-channel".  The SOC-specific compatible string (e.g.

"fsl,mpc8610-dma-channel") can remain.  If these nodes are left as

"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA

drivers (fsldma) will attempt to use them, and it will conflict with the

sound drivers.

		reg = <0x0 0x40000000>;	// set by uboot

	};

	localbus@fef05000 {

		#address-cells = <2>;

		#size-cells = <1>;

		compatible = "fsl,mpc8641-localbus", "simple-bus";

		reg = <0xf8005000 0x1000>;

		interrupts = <19 2>;

		interrupt-parent = <&mpic>;

		ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash

			  1 0 0xe8000000 0x08000000     // Paged Flash 0

			  2 0 0xe0000000 0x08000000     // Paged Flash 1

			  3 0 0xfc100000 0x00020000     // NVRAM

			  4 0 0xfc000000 0x00008000     // FPGA

			  5 0 0xfc008000 0x00008000     // AFIX FPGA

			  6 0 0xfd000000 0x00800000     // IO FPGA (8-bit)

			  7 0 0xfd800000 0x00800000>;   // IO FPGA (32-bit)

		fpga@4,0 {

			compatible = "gef,fpga-regs";

			reg = <0x4 0x0 0x40>;

		};

		gef_pic: pic@4,4000 {

			#interrupt-cells = <1>;

			interrupt-controller;

			compatible = "gef,fpga-pic";

			reg = <0x4 0x4000 0x20>;

			interrupts = <0x8

				      0x9>;

			interrupt-parent = <&mpic>;

		};

	};

	soc@fef00000 {

		#address-cells = <1>;

		#size-cells = <1>;

			reg = <0x24520 0x20>;

			phy0: ethernet-phy@0 {

				interrupt-parent = <&mpic>;

				interrupts = <0x0 0x1>;

				interrupt-parent = <&gef_pic>;

				interrupts = <0x9 0x4>;

				reg = <1>;

			};

			phy2: ethernet-phy@2 {

				interrupt-parent = <&mpic>;

				interrupts = <0x0 0x1>;

				interrupt-parent = <&gef_pic>;

				interrupts = <0x8 0x4>;

				reg = <3>;

			};

		};

		#interrupt-cells = <1>;

		#size-cells = <2>;

		#address-cells = <3>;

		reg = <0x80008500 0x100>;

		reg = <0x80008500 0x100		/* internal registers */

		       0x80008300 0x8>;		/* config space access registers */

		compatible = "fsl,mpc5121-pci";

		device_type = "pci";

	};