Merge "ARM: dts: msm: Update MMIO peripheral addresses on MSMCOBALT" (11f18d01) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+24 −24

Original line number	Diff line number	Diff line
		@@ -102,14 +102,14 @@
		ranges = <0 0 0 0xffffffff>;
		compatible = "simple-bus";

		intc: interrupt-controller@09bc0000 {
		intc: interrupt-controller@17bc0000 {
		compatible = "arm,gic-v3";
		#interrupt-cells = <3>;
		interrupt-controller;
		#redistributor-regions = <1>;
		redistributor-stride = <0x0 0x40000>;
		reg = <0x09bc0000 0x10000>, /* GICD */
		<0x09c00000 0x100000>; /* GICR * 4 */
		reg = <0x17bc0000 0x10000>, /* GICD */
		<0x17c00000 0x100000>; /* GICR * 4 */
		interrupts = <1 9 4>;
		};

		@@ -122,9 +122,9 @@
		clock-frequency = <19200000>;
		};

		uartblsp1dm1: serial@07570000 {
		uartblsp1dm1: serial@0c170000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0x7570000 0x1000>;
		reg = <0xc170000 0x1000>;
		interrupts = <0 108 0>;
		status = "disabled";
		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
		@@ -132,9 +132,9 @@
		clock-names = "core_clk", "iface_clk";
		};

		uartblsp2dm1: serial@075b0000 {
		uartblsp2dm1: serial@0c1b0000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0x75b0000 0x1000>;
		reg = <0xc1b0000 0x1000>;
		interrupts = <0 114 0>;
		status = "disabled";
		clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>,
		@@ -142,61 +142,61 @@
		clock-names = "core_clk", "iface_clk";
		};

		timer@09840000 {
		timer@17840000 {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "arm,armv7-timer-mem";
		reg = <0x09840000 0x1000>;
		reg = <0x17840000 0x1000>;
		clock-frequency = <19200000>;

		frame@09850000 {
		frame@17850000 {
		frame-number = <0>;
		interrupts = <0 31 0x4>,
		<0 30 0x4>;
		reg = <0x09850000 0x1000>,
		<0x09860000 0x1000>;
		reg = <0x17850000 0x1000>,
		<0x17860000 0x1000>;
		};

		frame@09870000 {
		frame@17870000 {
		frame-number = <1>;
		interrupts = <0 32 0x4>;
		reg = <0x09870000 0x1000>;
		reg = <0x17870000 0x1000>;
		status = "disabled";
		};

		frame@09880000 {
		frame@17880000 {
		frame-number = <2>;
		interrupts = <0 33 0x4>;
		reg = <0x09880000 0x1000>;
		reg = <0x17880000 0x1000>;
		status = "disabled";
		};

		frame@09890000 {
		frame@17890000 {
		frame-number = <3>;
		interrupts = <0 34 0x4>;
		reg = <0x09890000 0x1000>;
		reg = <0x17890000 0x1000>;
		status = "disabled";
		};

		frame@098a0000 {
		frame@178a0000 {
		frame-number = <4>;
		interrupts = <0 35 0x4>;
		reg = <0x098a0000 0x1000>;
		reg = <0x178a0000 0x1000>;
		status = "disabled";
		};

		frame@098b0000 {
		frame@178b0000 {
		frame-number = <5>;
		interrupts = <0 36 0x4>;
		reg = <0x098b0000 0x1000>;
		reg = <0x178b0000 0x1000>;
		status = "disabled";
		};

		frame@098c0000 {
		frame@178c0000 {
		frame-number = <6>;
		interrupts = <0 37 0x4>;
		reg = <0x098c0000 0x1000>;
		reg = <0x178c0000 0x1000>;
		status = "disabled";
		};
		};

arch/arm64/kernel/setup.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -504,7 +504,7 @@ static int c_show(struct seq_file m, void v)
		{
		int i, j;

		for_each_online_cpu(i) {
		for_each_present_cpu(i) {
		struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i);
		u32 midr = cpuinfo->reg_midr;
		/*