Loading drivers/media/platform/msm/camera_v2/isp/msm_isp.h +5 −5 Original line number Diff line number Diff line Loading @@ -200,15 +200,12 @@ struct msm_vfe_axi_ops { uint8_t plane_idx); void (*clear_wm_xbar_reg)(struct vfe_device *vfe_dev, struct msm_vfe_axi_stream *stream_info, uint8_t plane_idx); void (*cfg_ub)(struct vfe_device *vfe_dev); void (*cfg_ub)(struct vfe_device *vfe_dev, enum msm_vfe_input_src frame_src); void (*read_wm_ping_pong_addr)(struct vfe_device *vfe_dev); void (*update_ping_pong_addr)(void __iomem *vfe_base, uint8_t wm_idx, uint32_t pingpong_bit, dma_addr_t paddr, int32_t buf_size); uint32_t (*get_wm_mask)(uint32_t irq_status0, uint32_t irq_status1); uint32_t (*get_comp_mask)(uint32_t irq_status0, uint32_t irq_status1); uint32_t (*get_pingpong_status)(struct vfe_device *vfe_dev); Loading @@ -217,6 +214,8 @@ struct msm_vfe_axi_ops { uint32_t enable_camif); void (*update_cgc_override)(struct vfe_device *vfe_dev, uint8_t wm_idx, uint8_t cgc_override); uint32_t (*ub_reg_offset)(struct vfe_device *vfe_dev, int idx); uint32_t (*get_ub_size)(struct vfe_device *vfe_dev); }; struct msm_vfe_core_ops { Loading Loading @@ -470,6 +469,7 @@ struct msm_vfe_src_info { uint32_t frame_id; uint32_t reg_update_frame_id; uint8_t active; uint8_t flag; uint8_t pix_stream_count; uint8_t raw_stream_count; enum msm_vfe_inputmux input_mux; Loading drivers/media/platform/msm/camera_v2/isp/msm_isp32.c +13 −70 Original line number Diff line number Diff line Loading @@ -60,6 +60,16 @@ static struct msm_cam_clk_info msm_vfe32_2_clk_info[] = { {"csi_vfe_clk", -1}, }; static uint32_t msm_vfe32_ub_reg_offset(struct vfe_device *vfe_dev, int idx) { return (VFE32_WM_BASE(idx) + 0xC); } static uint32_t msm_vfe32_get_ub_size(struct vfe_device *vfe_dev) { return MSM_ISP32_TOTAL_WM_UB; } static int32_t msm_vfe32_init_qos_parms(struct vfe_device *vfe_dev, struct msm_vfe_hw_init_parms *qos_parms, struct msm_vfe_hw_init_parms *ds_parms) Loading Loading @@ -1100,75 +1110,6 @@ static void msm_vfe32_axi_clear_wm_xbar_reg( msm_camera_io_w(xbar_reg_cfg, vfe_dev->vfe_base + VFE32_XBAR_BASE(wm)); } static void msm_vfe32_cfg_axi_ub_equal_default(struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint32_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } prop_size = MSM_ISP32_TOTAL_WM_UB - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)(axi_data->wm_image_size[i] * prop_size); do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += wm_ub_size; } else { msm_camera_io_w(0, vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); } } } static void msm_vfe32_cfg_axi_ub_equal_slicing(struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; uint32_t final_ub_slice_size; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (ub_offset + VFE32_EQUAL_SLICE_UB > VFE32_AXI_SLICE_UB) { final_ub_slice_size = VFE32_AXI_SLICE_UB - ub_offset; msm_camera_io_w(ub_offset << 16 | (final_ub_slice_size - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += final_ub_slice_size; } else { msm_camera_io_w(ub_offset << 16 | (VFE32_EQUAL_SLICE_UB - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += VFE32_EQUAL_SLICE_UB; } } } static void msm_vfe32_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe32_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe32_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe32_update_ping_pong_addr(void __iomem *vfe_base, uint8_t wm_idx, uint32_t pingpong_bit, dma_addr_t paddr, int32_t buf_size) Loading Loading @@ -1505,13 +1446,15 @@ struct msm_vfe_hardware_info vfe32_hw_info = { .clear_wm_reg = msm_vfe32_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe32_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe32_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe32_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .update_ping_pong_addr = msm_vfe32_update_ping_pong_addr, .get_comp_mask = msm_vfe32_get_comp_mask, .get_wm_mask = msm_vfe32_get_wm_mask, .get_pingpong_status = msm_vfe32_get_pingpong_status, .halt = msm_vfe32_axi_halt, .ub_reg_offset = msm_vfe32_ub_reg_offset, .get_ub_size = msm_vfe32_get_ub_size, }, .core_ops = { .reg_update = msm_vfe32_reg_update, Loading drivers/media/platform/msm/camera_v2/isp/msm_isp40.c +17 −99 Original line number Diff line number Diff line Loading @@ -96,6 +96,20 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE40_CLK_IDX 2 static uint32_t msm_vfe40_ub_reg_offset(struct vfe_device *vfe_dev, int idx) { return (VFE40_WM_BASE(idx) + 0x10); } static uint32_t msm_vfe40_get_ub_size(struct vfe_device *vfe_dev) { if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB_8916; return VFE40_TOTAL_WM_UB_8916; } return VFE40_TOTAL_WM_UB; } static void msm_vfe40_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1672,104 +1686,6 @@ static void msm_vfe40_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE40_XBAR_BASE(wm)); } static void msm_vfe40_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint32_t total_wm_ub; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB_8916; total_wm_ub = VFE40_TOTAL_WM_UB_8916; } else { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB; total_wm_ub = VFE40_TOTAL_WM_UB; } vfe_dev->ub_info->num_wm = axi_data->hw_info->num_wm; prop_size = total_wm_ub - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { uint64_t delta = 0; uint64_t temp = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(temp, total_image_size); delta = temp; wm_ub_size = axi_data->hw_info->min_wm_ub + delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = ub_offset << 16 | (wm_ub_size - 1); vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; ub_offset += wm_ub_size; } else { msm_camera_io_w(0, vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = 0; vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; } } } static void msm_vfe40_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; uint32_t equal_slice_ub; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION || vfe_dev->vfe_hw_version == VFE40_8952_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_EQUAL_SLICE_UB_8916; equal_slice_ub = VFE40_EQUAL_SLICE_UB_8916; } else { vfe_dev->ub_info->wm_ub = VFE40_EQUAL_SLICE_UB; equal_slice_ub = VFE40_EQUAL_SLICE_UB; } vfe_dev->ub_info->num_wm = axi_data->hw_info->num_wm; for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (equal_slice_ub - 1), vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = ub_offset << 16 | (equal_slice_ub - 1); vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; ub_offset += equal_slice_ub; } } static void msm_vfe40_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = (enum msm_wm_ub_cfg_type)vfe_dev->vfe_ub_policy; ISP_DBG("%s: ub_policy %d\n", __func__, axi_data->wm_ub_cfg_policy); if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) { vfe_dev->ub_info->policy = MSM_WM_UB_EQUAL_SLICING; msm_vfe40_cfg_axi_ub_equal_slicing(vfe_dev); } else { vfe_dev->ub_info->policy = MSM_WM_UB_CFG_DEFAULT; msm_vfe40_cfg_axi_ub_equal_default(vfe_dev); } } static void msm_vfe40_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -2297,7 +2213,7 @@ struct msm_vfe_hardware_info vfe40_hw_info = { .clear_wm_reg = msm_vfe40_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe40_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe40_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe40_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe40_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -2309,6 +2225,8 @@ struct msm_vfe_hardware_info vfe40_hw_info = { .restart = msm_vfe40_axi_restart, .update_cgc_override = msm_vfe40_axi_update_cgc_override, .ub_reg_offset = msm_vfe40_ub_reg_offset, .get_ub_size = msm_vfe40_get_ub_size, }, .core_ops = { .reg_update = msm_vfe40_reg_update, Loading drivers/media/platform/msm/camera_v2/isp/msm_isp44.c +13 −62 Original line number Diff line number Diff line Loading @@ -65,6 +65,16 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE44_CLK_IDX 2 static uint32_t msm_vfe44_ub_reg_offset(struct vfe_device *vfe_dev, int wm_idx) { return (VFE44_WM_BASE(wm_idx) + 0x10); } static uint32_t msm_vfe44_get_ub_size(struct vfe_device *vfe_dev) { return MSM_ISP44_TOTAL_IMAGE_UB; } static void msm_vfe44_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1231,67 +1241,6 @@ static void msm_vfe44_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE44_XBAR_BASE(wm)); } static void msm_vfe44_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } prop_size = MSM_ISP44_TOTAL_IMAGE_UB - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); ub_offset += wm_ub_size; } else msm_camera_io_w(0, vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); } } static void msm_vfe44_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t ub_equal_slice = MSM_ISP44_TOTAL_IMAGE_UB / axi_data->hw_info->num_wm; for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (ub_equal_slice - 1), vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); ub_offset += ub_equal_slice; } } static void msm_vfe44_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe44_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe44_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe44_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -1865,7 +1814,7 @@ struct msm_vfe_hardware_info vfe44_hw_info = { .clear_wm_reg = msm_vfe44_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe44_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe44_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe44_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe44_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -1877,6 +1826,8 @@ struct msm_vfe_hardware_info vfe44_hw_info = { .restart = msm_vfe44_axi_restart, .update_cgc_override = msm_vfe44_axi_update_cgc_override, .ub_reg_offset = msm_vfe44_ub_reg_offset, .get_ub_size = msm_vfe44_get_ub_size, }, .core_ops = { .reg_update = msm_vfe44_reg_update, Loading drivers/media/platform/msm/camera_v2/isp/msm_isp46.c +15 −80 Original line number Diff line number Diff line Loading @@ -87,6 +87,18 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE46_CLK_IDX 2 uint32_t msm_vfe46_ub_reg_offset(struct vfe_device *vfe_dev, int wm_idx) { return (VFE46_WM_BASE(wm_idx) + 0x10); } uint32_t msm_vfe46_get_ub_size(struct vfe_device *vfe_dev) { if (vfe_dev->pdev->id == ISP_VFE0) return MSM_ISP46_TOTAL_IMAGE_UB_VFE0; return MSM_ISP46_TOTAL_IMAGE_UB_VFE1; } static void msm_vfe46_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1303,85 +1315,6 @@ static void msm_vfe46_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE46_XBAR_BASE(wm)); } static void msm_vfe46_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } if (vfe_dev->pdev->id == ISP_VFE0) { prop_size = MSM_ISP46_TOTAL_IMAGE_UB_VFE0 - axi_data->hw_info->min_wm_ub * num_used_wms; } else if (vfe_dev->pdev->id == ISP_VFE1) { prop_size = MSM_ISP46_TOTAL_IMAGE_UB_VFE1 - axi_data->hw_info->min_wm_ub * num_used_wms; } else { pr_err("%s: incorrect VFE device\n", __func__); } for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); ub_offset += wm_ub_size; } else msm_camera_io_w(0, vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); } } static void msm_vfe46_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t ub_equal_slice = 0; if (vfe_dev->pdev->id == ISP_VFE0) { ub_equal_slice = MSM_ISP46_TOTAL_IMAGE_UB_VFE0 / axi_data->hw_info->num_wm; } else if (vfe_dev->pdev->id == ISP_VFE1) { ub_equal_slice = MSM_ISP46_TOTAL_IMAGE_UB_VFE1 / axi_data->hw_info->num_wm; } else { pr_err("%s: incorrect VFE device\n ", __func__); } for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (ub_equal_slice - 1), vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); ub_offset += ub_equal_slice; } } static void msm_vfe46_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe46_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe46_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe46_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -1969,7 +1902,7 @@ struct msm_vfe_hardware_info vfe46_hw_info = { .clear_wm_reg = msm_vfe46_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe46_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe46_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe46_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe46_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -1981,6 +1914,8 @@ struct msm_vfe_hardware_info vfe46_hw_info = { .restart = msm_vfe46_axi_restart, .update_cgc_override = msm_vfe46_axi_update_cgc_override, .ub_reg_offset = msm_vfe46_ub_reg_offset, .get_ub_size = msm_vfe46_get_ub_size, }, .core_ops = { .reg_update = msm_vfe46_reg_update, Loading Loading
drivers/media/platform/msm/camera_v2/isp/msm_isp.h +5 −5 Original line number Diff line number Diff line Loading @@ -200,15 +200,12 @@ struct msm_vfe_axi_ops { uint8_t plane_idx); void (*clear_wm_xbar_reg)(struct vfe_device *vfe_dev, struct msm_vfe_axi_stream *stream_info, uint8_t plane_idx); void (*cfg_ub)(struct vfe_device *vfe_dev); void (*cfg_ub)(struct vfe_device *vfe_dev, enum msm_vfe_input_src frame_src); void (*read_wm_ping_pong_addr)(struct vfe_device *vfe_dev); void (*update_ping_pong_addr)(void __iomem *vfe_base, uint8_t wm_idx, uint32_t pingpong_bit, dma_addr_t paddr, int32_t buf_size); uint32_t (*get_wm_mask)(uint32_t irq_status0, uint32_t irq_status1); uint32_t (*get_comp_mask)(uint32_t irq_status0, uint32_t irq_status1); uint32_t (*get_pingpong_status)(struct vfe_device *vfe_dev); Loading @@ -217,6 +214,8 @@ struct msm_vfe_axi_ops { uint32_t enable_camif); void (*update_cgc_override)(struct vfe_device *vfe_dev, uint8_t wm_idx, uint8_t cgc_override); uint32_t (*ub_reg_offset)(struct vfe_device *vfe_dev, int idx); uint32_t (*get_ub_size)(struct vfe_device *vfe_dev); }; struct msm_vfe_core_ops { Loading Loading @@ -470,6 +469,7 @@ struct msm_vfe_src_info { uint32_t frame_id; uint32_t reg_update_frame_id; uint8_t active; uint8_t flag; uint8_t pix_stream_count; uint8_t raw_stream_count; enum msm_vfe_inputmux input_mux; Loading
drivers/media/platform/msm/camera_v2/isp/msm_isp32.c +13 −70 Original line number Diff line number Diff line Loading @@ -60,6 +60,16 @@ static struct msm_cam_clk_info msm_vfe32_2_clk_info[] = { {"csi_vfe_clk", -1}, }; static uint32_t msm_vfe32_ub_reg_offset(struct vfe_device *vfe_dev, int idx) { return (VFE32_WM_BASE(idx) + 0xC); } static uint32_t msm_vfe32_get_ub_size(struct vfe_device *vfe_dev) { return MSM_ISP32_TOTAL_WM_UB; } static int32_t msm_vfe32_init_qos_parms(struct vfe_device *vfe_dev, struct msm_vfe_hw_init_parms *qos_parms, struct msm_vfe_hw_init_parms *ds_parms) Loading Loading @@ -1100,75 +1110,6 @@ static void msm_vfe32_axi_clear_wm_xbar_reg( msm_camera_io_w(xbar_reg_cfg, vfe_dev->vfe_base + VFE32_XBAR_BASE(wm)); } static void msm_vfe32_cfg_axi_ub_equal_default(struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint32_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } prop_size = MSM_ISP32_TOTAL_WM_UB - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)(axi_data->wm_image_size[i] * prop_size); do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += wm_ub_size; } else { msm_camera_io_w(0, vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); } } } static void msm_vfe32_cfg_axi_ub_equal_slicing(struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; uint32_t final_ub_slice_size; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (ub_offset + VFE32_EQUAL_SLICE_UB > VFE32_AXI_SLICE_UB) { final_ub_slice_size = VFE32_AXI_SLICE_UB - ub_offset; msm_camera_io_w(ub_offset << 16 | (final_ub_slice_size - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += final_ub_slice_size; } else { msm_camera_io_w(ub_offset << 16 | (VFE32_EQUAL_SLICE_UB - 1), vfe_dev->vfe_base + VFE32_WM_BASE(i) + 0xC); ub_offset += VFE32_EQUAL_SLICE_UB; } } } static void msm_vfe32_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe32_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe32_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe32_update_ping_pong_addr(void __iomem *vfe_base, uint8_t wm_idx, uint32_t pingpong_bit, dma_addr_t paddr, int32_t buf_size) Loading Loading @@ -1505,13 +1446,15 @@ struct msm_vfe_hardware_info vfe32_hw_info = { .clear_wm_reg = msm_vfe32_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe32_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe32_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe32_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .update_ping_pong_addr = msm_vfe32_update_ping_pong_addr, .get_comp_mask = msm_vfe32_get_comp_mask, .get_wm_mask = msm_vfe32_get_wm_mask, .get_pingpong_status = msm_vfe32_get_pingpong_status, .halt = msm_vfe32_axi_halt, .ub_reg_offset = msm_vfe32_ub_reg_offset, .get_ub_size = msm_vfe32_get_ub_size, }, .core_ops = { .reg_update = msm_vfe32_reg_update, Loading
drivers/media/platform/msm/camera_v2/isp/msm_isp40.c +17 −99 Original line number Diff line number Diff line Loading @@ -96,6 +96,20 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE40_CLK_IDX 2 static uint32_t msm_vfe40_ub_reg_offset(struct vfe_device *vfe_dev, int idx) { return (VFE40_WM_BASE(idx) + 0x10); } static uint32_t msm_vfe40_get_ub_size(struct vfe_device *vfe_dev) { if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB_8916; return VFE40_TOTAL_WM_UB_8916; } return VFE40_TOTAL_WM_UB; } static void msm_vfe40_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1672,104 +1686,6 @@ static void msm_vfe40_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE40_XBAR_BASE(wm)); } static void msm_vfe40_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint32_t total_wm_ub; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB_8916; total_wm_ub = VFE40_TOTAL_WM_UB_8916; } else { vfe_dev->ub_info->wm_ub = VFE40_TOTAL_WM_UB; total_wm_ub = VFE40_TOTAL_WM_UB; } vfe_dev->ub_info->num_wm = axi_data->hw_info->num_wm; prop_size = total_wm_ub - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { uint64_t delta = 0; uint64_t temp = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(temp, total_image_size); delta = temp; wm_ub_size = axi_data->hw_info->min_wm_ub + delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = ub_offset << 16 | (wm_ub_size - 1); vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; ub_offset += wm_ub_size; } else { msm_camera_io_w(0, vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = 0; vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; } } } static void msm_vfe40_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; uint32_t equal_slice_ub; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; if (vfe_dev->vfe_hw_version == VFE40_8916_VERSION || vfe_dev->vfe_hw_version == VFE40_8952_VERSION) { vfe_dev->ub_info->wm_ub = VFE40_EQUAL_SLICE_UB_8916; equal_slice_ub = VFE40_EQUAL_SLICE_UB_8916; } else { vfe_dev->ub_info->wm_ub = VFE40_EQUAL_SLICE_UB; equal_slice_ub = VFE40_EQUAL_SLICE_UB; } vfe_dev->ub_info->num_wm = axi_data->hw_info->num_wm; for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (equal_slice_ub - 1), vfe_dev->vfe_base + VFE40_WM_BASE(i) + 0x10); vfe_dev->ub_info->data[i] = ub_offset << 16 | (equal_slice_ub - 1); vfe_dev->ub_info->addr[i] = VFE40_WM_BASE(i) + 0x10; ub_offset += equal_slice_ub; } } static void msm_vfe40_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = (enum msm_wm_ub_cfg_type)vfe_dev->vfe_ub_policy; ISP_DBG("%s: ub_policy %d\n", __func__, axi_data->wm_ub_cfg_policy); if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) { vfe_dev->ub_info->policy = MSM_WM_UB_EQUAL_SLICING; msm_vfe40_cfg_axi_ub_equal_slicing(vfe_dev); } else { vfe_dev->ub_info->policy = MSM_WM_UB_CFG_DEFAULT; msm_vfe40_cfg_axi_ub_equal_default(vfe_dev); } } static void msm_vfe40_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -2297,7 +2213,7 @@ struct msm_vfe_hardware_info vfe40_hw_info = { .clear_wm_reg = msm_vfe40_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe40_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe40_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe40_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe40_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -2309,6 +2225,8 @@ struct msm_vfe_hardware_info vfe40_hw_info = { .restart = msm_vfe40_axi_restart, .update_cgc_override = msm_vfe40_axi_update_cgc_override, .ub_reg_offset = msm_vfe40_ub_reg_offset, .get_ub_size = msm_vfe40_get_ub_size, }, .core_ops = { .reg_update = msm_vfe40_reg_update, Loading
drivers/media/platform/msm/camera_v2/isp/msm_isp44.c +13 −62 Original line number Diff line number Diff line Loading @@ -65,6 +65,16 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE44_CLK_IDX 2 static uint32_t msm_vfe44_ub_reg_offset(struct vfe_device *vfe_dev, int wm_idx) { return (VFE44_WM_BASE(wm_idx) + 0x10); } static uint32_t msm_vfe44_get_ub_size(struct vfe_device *vfe_dev) { return MSM_ISP44_TOTAL_IMAGE_UB; } static void msm_vfe44_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1231,67 +1241,6 @@ static void msm_vfe44_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE44_XBAR_BASE(wm)); } static void msm_vfe44_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } prop_size = MSM_ISP44_TOTAL_IMAGE_UB - axi_data->hw_info->min_wm_ub * num_used_wms; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); ub_offset += wm_ub_size; } else msm_camera_io_w(0, vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); } } static void msm_vfe44_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t ub_equal_slice = MSM_ISP44_TOTAL_IMAGE_UB / axi_data->hw_info->num_wm; for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (ub_equal_slice - 1), vfe_dev->vfe_base + VFE44_WM_BASE(i) + 0x10); ub_offset += ub_equal_slice; } } static void msm_vfe44_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe44_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe44_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe44_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -1865,7 +1814,7 @@ struct msm_vfe_hardware_info vfe44_hw_info = { .clear_wm_reg = msm_vfe44_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe44_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe44_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe44_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe44_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -1877,6 +1826,8 @@ struct msm_vfe_hardware_info vfe44_hw_info = { .restart = msm_vfe44_axi_restart, .update_cgc_override = msm_vfe44_axi_update_cgc_override, .ub_reg_offset = msm_vfe44_ub_reg_offset, .get_ub_size = msm_vfe44_get_ub_size, }, .core_ops = { .reg_update = msm_vfe44_reg_update, Loading
drivers/media/platform/msm/camera_v2/isp/msm_isp46.c +15 −80 Original line number Diff line number Diff line Loading @@ -87,6 +87,18 @@ static uint8_t stats_pingpong_offset_map[] = { #define VFE46_CLK_IDX 2 uint32_t msm_vfe46_ub_reg_offset(struct vfe_device *vfe_dev, int wm_idx) { return (VFE46_WM_BASE(wm_idx) + 0x10); } uint32_t msm_vfe46_get_ub_size(struct vfe_device *vfe_dev) { if (vfe_dev->pdev->id == ISP_VFE0) return MSM_ISP46_TOTAL_IMAGE_UB_VFE0; return MSM_ISP46_TOTAL_IMAGE_UB_VFE1; } static void msm_vfe46_config_irq(struct vfe_device *vfe_dev, uint32_t irq0_mask, uint32_t irq1_mask, enum msm_isp_irq_operation oper) Loading Loading @@ -1303,85 +1315,6 @@ static void msm_vfe46_axi_clear_wm_xbar_reg( vfe_dev->vfe_base + VFE46_XBAR_BASE(wm)); } static void msm_vfe46_cfg_axi_ub_equal_default( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t total_image_size = 0; uint8_t num_used_wms = 0; uint32_t prop_size = 0; uint32_t wm_ub_size; uint64_t delta; for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i] > 0) { num_used_wms++; total_image_size += axi_data->wm_image_size[i]; } } if (vfe_dev->pdev->id == ISP_VFE0) { prop_size = MSM_ISP46_TOTAL_IMAGE_UB_VFE0 - axi_data->hw_info->min_wm_ub * num_used_wms; } else if (vfe_dev->pdev->id == ISP_VFE1) { prop_size = MSM_ISP46_TOTAL_IMAGE_UB_VFE1 - axi_data->hw_info->min_wm_ub * num_used_wms; } else { pr_err("%s: incorrect VFE device\n", __func__); } for (i = 0; i < axi_data->hw_info->num_wm; i++) { if (axi_data->free_wm[i]) { delta = (uint64_t)axi_data->wm_image_size[i] * (uint64_t)prop_size; do_div(delta, total_image_size); wm_ub_size = axi_data->hw_info->min_wm_ub + (uint32_t)delta; msm_camera_io_w(ub_offset << 16 | (wm_ub_size - 1), vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); ub_offset += wm_ub_size; } else msm_camera_io_w(0, vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); } } static void msm_vfe46_cfg_axi_ub_equal_slicing( struct vfe_device *vfe_dev) { int i; uint32_t ub_offset = 0; struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; uint32_t ub_equal_slice = 0; if (vfe_dev->pdev->id == ISP_VFE0) { ub_equal_slice = MSM_ISP46_TOTAL_IMAGE_UB_VFE0 / axi_data->hw_info->num_wm; } else if (vfe_dev->pdev->id == ISP_VFE1) { ub_equal_slice = MSM_ISP46_TOTAL_IMAGE_UB_VFE1 / axi_data->hw_info->num_wm; } else { pr_err("%s: incorrect VFE device\n ", __func__); } for (i = 0; i < axi_data->hw_info->num_wm; i++) { msm_camera_io_w(ub_offset << 16 | (ub_equal_slice - 1), vfe_dev->vfe_base + VFE46_WM_BASE(i) + 0x10); ub_offset += ub_equal_slice; } } static void msm_vfe46_cfg_axi_ub(struct vfe_device *vfe_dev) { struct msm_vfe_axi_shared_data *axi_data = &vfe_dev->axi_data; axi_data->wm_ub_cfg_policy = MSM_WM_UB_CFG_DEFAULT; if (axi_data->wm_ub_cfg_policy == MSM_WM_UB_EQUAL_SLICING) msm_vfe46_cfg_axi_ub_equal_slicing(vfe_dev); else msm_vfe46_cfg_axi_ub_equal_default(vfe_dev); } static void msm_vfe46_read_wm_ping_pong_addr( struct vfe_device *vfe_dev) { Loading Loading @@ -1969,7 +1902,7 @@ struct msm_vfe_hardware_info vfe46_hw_info = { .clear_wm_reg = msm_vfe46_axi_clear_wm_reg, .cfg_wm_xbar_reg = msm_vfe46_axi_cfg_wm_xbar_reg, .clear_wm_xbar_reg = msm_vfe46_axi_clear_wm_xbar_reg, .cfg_ub = msm_vfe46_cfg_axi_ub, .cfg_ub = msm_vfe47_cfg_axi_ub, .read_wm_ping_pong_addr = msm_vfe46_read_wm_ping_pong_addr, .update_ping_pong_addr = Loading @@ -1981,6 +1914,8 @@ struct msm_vfe_hardware_info vfe46_hw_info = { .restart = msm_vfe46_axi_restart, .update_cgc_override = msm_vfe46_axi_update_cgc_override, .ub_reg_offset = msm_vfe46_ub_reg_offset, .get_ub_size = msm_vfe46_get_ub_size, }, .core_ops = { .reg_update = msm_vfe46_reg_update, Loading