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Commit 116039f9 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: mdmcalifornium: Add device nodes for mss pil and ssr"

parents 009ff79d 4077c4e0
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+24 −0
Original line number Original line Diff line number Diff line
@@ -80,4 +80,28 @@
		compatible = "qcom,smp2pgpio_test_smp2p_1_out";
		compatible = "qcom,smp2pgpio_test_smp2p_1_out";
		gpios = <&smp2pgpio_smp2p_1_out 0 0>;
		gpios = <&smp2pgpio_smp2p_1_out 0 0>;
	};
	};

	/* ssr - inbound entry from mss. */
	smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in {
		compatible = "qcom,smp2pgpio";
		qcom,entry-name = "slave-kernel";
		qcom,remote-pid = <1>;
		qcom,is-inbound;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	/* ssr - outbound entry to mss. */
	smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out {
		compatible = "qcom,smp2pgpio";
		qcom,entry-name = "master-kernel";
		qcom,remote-pid = <1>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

};
};
+46 −0
Original line number Original line Diff line number Diff line
@@ -117,6 +117,52 @@
		};
		};
	};
	};


	qcom,mss@4080000{
		compatible = "qcom,pil-q6v55-mss";
		reg = <0x4080000 0x100>,
		      <0x194e000 0x400>,
		      <0x4180000 0x040>,
		      <0x1810000 0x004>;
		reg-names = "qdsp6_base", "halt_base", "rmb_base",
			    "restart_reg";

		clocks = <&clock_gcc clk_xo>,
			 <&clock_gcc clk_gcc_mss_cfg_ahb_clk>,
			 <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,
			 <&clock_gcc clk_gcc_boot_rom_ahb_clk>,
			 <&clock_gcc clk_gpll0_out_msscc>;
		clock-names = "xo", "iface_clk", "bus_clk", "mem_clk",
			      "gpll0_mss_clk";
		qcom,proxy-clock-names = "xo";
		qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk",
					"gpll0_mss_clk";

		interrupts = <0 24 1>;
		vdd_cx-supply = <&pmdcalifornium_s5_level>;
		vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
		vdd_mx-supply = <&pmdcalifornium_l9_level>;
		vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
		vdd_pll-supply = <&pmdcalifornium_l5>;
		qcom,vdd_pll = <1800000>;
		qcom,firmware-name = "modem";
		qcom,pil-self-auth;
		qcom,sysmon-id = <0>;
		qcom,ssctl-instance-id = <0x12>;
		qcom,override-acc;
		qcom,qdsp6v61-1-1;
		memory-region = <&mss_mem>;

		/* GPIO inputs from mss */
		qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
		qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
		qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
		qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;

		/* GPIO output to mss */
		qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;

	};

	clock_gcc: qcom,gcc@1800000 {
	clock_gcc: qcom,gcc@1800000 {
		compatible = "qcom,gcc-californium";
		compatible = "qcom,gcc-californium";
		reg = <0x1800000 0x80000>,
		reg = <0x1800000 0x80000>,