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Commit 1073368f authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: msm: gdsc: Check gdsc state before disabling the root clock"

parents 9cb40592 4dd2b241
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+3 −3
Original line number Diff line number Diff line
@@ -3463,7 +3463,7 @@
&gdsc_mmagic_video {
	clock-names = "core_root_clk";
	/* RPM enables the mmagic bimc GDSC when this clk node is voted for. */
	clocks = <&clock_gcc clk_mmssnoc_axi_clk>;
	clocks = <&clock_gcc clk_mmssnoc_gds_clk>;
	qcom,enable-root-clk;
	status = "ok";
};
@@ -3471,7 +3471,7 @@
&gdsc_mmagic_mdss {
	clock-names = "core_root_clk";
	/* RPM enables the mmagic bimc GDSC when this clk node is voted for. */
	clocks = <&clock_gcc clk_mmssnoc_axi_clk>;
	clocks = <&clock_gcc clk_mmssnoc_gds_clk>;
	qcom,enable-root-clk;
	status = "ok";
};
@@ -3479,7 +3479,7 @@
&gdsc_mmagic_camss {
	clock-names = "core_root_clk";
	/* RPM enables the mmagic bimc GDSC when this clk node is voted for. */
	clocks = <&clock_gcc clk_mmssnoc_axi_clk>;
	clocks = <&clock_gcc clk_mmssnoc_gds_clk>;
	qcom,enable-root-clk;
	status = "ok";
};
+8 −2
Original line number Diff line number Diff line
@@ -66,8 +66,11 @@ DEFINE_CLK_RPM_SMD(bimc_clk, bimc_a_clk, RPM_MEM_CLK_TYPE, BIMC_CLK_ID, NULL);
DEFINE_CLK_RPM_SMD(cnoc_clk, cnoc_a_clk, RPM_BUS_CLK_TYPE, CNOC_CLK_ID, NULL);
DEFINE_CLK_RPM_SMD(snoc_clk, snoc_a_clk, RPM_BUS_CLK_TYPE, SNOC_CLK_ID, NULL);

DEFINE_CLK_RPM_SMD(mmssnoc_axi_clk, mmssnoc_axi_a_clk, RPM_MMAXI_CLK_TYPE,
				MMXI_CLK_ID, NULL);
DEFINE_CLK_RPM_SMD(mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk,
				RPM_MMAXI_CLK_TYPE, MMXI_CLK_ID, NULL);
DEFINE_CLK_VOTER(mmssnoc_axi_clk, &mmssnoc_axi_rpm_clk.c, 0);
DEFINE_CLK_VOTER(mmssnoc_axi_a_clk, &mmssnoc_axi_rpm_a_clk.c, 0);
DEFINE_CLK_VOTER(mmssnoc_gds_clk, &mmssnoc_axi_rpm_clk.c, 40000000);

DEFINE_CLK_RPM_SMD_BRANCH(aggre1_noc_clk, aggre1_noc_a_clk,
				RPM_AGGR_CLK_TYPE, AGGR1_NOC_ID, 1000);
@@ -3330,8 +3333,11 @@ static struct clk_lookup msm_clocks_rpm_8996[] = {
	CLK_LIST(aggre1_noc_a_clk),
	CLK_LIST(aggre2_noc_clk),
	CLK_LIST(aggre2_noc_a_clk),
	CLK_LIST(mmssnoc_axi_rpm_clk),
	CLK_LIST(mmssnoc_axi_rpm_a_clk),
	CLK_LIST(mmssnoc_axi_clk),
	CLK_LIST(mmssnoc_axi_a_clk),
	CLK_LIST(mmssnoc_gds_clk),
	CLK_LIST(bb_clk1),
	CLK_LIST(bb_clk1_ao),
	CLK_LIST(bb_clk1_pin),
+8 −3
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ struct gdsc {
	bool			force_root_en;
	int			root_clk_idx;
	bool			no_status_check_on_disable;
	bool			is_gdsc_enabled;
	void __iomem		*domain_addr;
};

@@ -184,7 +185,7 @@ static int gdsc_enable(struct regulator_dev *rdev)

	if (sc->force_root_en)
		clk_disable_unprepare(sc->clocks[sc->root_clk_idx]);

	sc->is_gdsc_enabled = true;
	return 0;
}

@@ -249,9 +250,13 @@ static int gdsc_disable(struct regulator_dev *rdev)
		sc->resets_asserted = true;
	}

	if (sc->root_en || sc->force_root_en)
	/*
	 * Check if gdsc_enable was called for this GDSC. If not, the root
	 * clock will not have been enabled prior to this.
	 */
	if ((sc->is_gdsc_enabled && sc->root_en) || sc->force_root_en)
		clk_disable_unprepare(sc->clocks[sc->root_clk_idx]);

	sc->is_gdsc_enabled = false;
	return ret;
}

+3 −0
Original line number Diff line number Diff line
@@ -83,8 +83,11 @@
#define clk_aggre1_noc_a_clk		0xc12e4220
#define clk_aggre2_noc_clk		0xaa681404
#define clk_aggre2_noc_a_clk		0xcab67089
#define clk_mmssnoc_axi_rpm_clk		0x4d7f8cdc
#define clk_mmssnoc_axi_rpm_a_clk	0xfbea899b
#define clk_mmssnoc_axi_clk		0xdb4b31e6
#define clk_mmssnoc_axi_a_clk		0xd4970614
#define clk_mmssnoc_gds_clk		0x06a22afa

#define clk_gpll0			0x1ebe3bc4
#define clk_gpll0_ao			0xa1368304