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Commit 0fd2c201 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: don't enable the gen6 bsd ring tail write enable on gen7 



HW engineers have fixed this issue for ivb. Again, a nice cleanup
possible thanks to the more flexible ring initialization.

Reviewed-by: default avatarEric Anholt <eric@anholt.net>
Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e48d8634

drivers/gpu/drm/i915/intel_ringbuffer.c

+4 −2
Original line number Diff line number Diff line
@@ -1415,8 +1415,11 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) 
	ring->name = "bsd ring";

	ring->id = VCS;



	ring->write_tail = ring_write_tail;

	if (IS_GEN6(dev) || IS_GEN7(dev)) {

		ring->mmio_base = GEN6_BSD_RING_BASE;

		/* gen6 bsd needs a special wa for tail updates */

		if (IS_GEN6(dev))

			ring->write_tail = gen6_bsd_ring_write_tail;

		ring->flush = gen6_ring_flush;

		ring->add_request = gen6_add_request;
@@ -1433,7 +1436,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) 
		ring->signal_mbox[1] = GEN6_BVSYNC;

	} else {

		ring->mmio_base = BSD_RING_BASE;

		ring->write_tail = ring_write_tail;

		ring->flush = bsd_ring_flush;

		ring->add_request = ring_add_request;

		ring->get_seqno = ring_get_seqno;