Loading arch/x86/kernel/mpparse_32.c +0 −5 Original line number Diff line number Diff line Loading @@ -69,11 +69,6 @@ unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP physid_mask_t phys_cpu_present_map; #endif /* * Intel MP BIOS table parsing routines: */ Loading arch/x86/kernel/mpparse_64.c +0 −5 Original line number Diff line number Diff line Loading @@ -70,11 +70,6 @@ unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP physid_mask_t phys_cpu_present_map; #endif /* * Intel MP BIOS table parsing routines: */ Loading arch/x86/kernel/setup.c +4 −0 Original line number Diff line number Diff line Loading @@ -9,11 +9,15 @@ #include <asm/processor.h> #include <asm/setup.h> #include <asm/topology.h> #include <asm/mpspec.h> #include <asm/apicdef.h> DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid); /* Bitmask of physically existing CPUs */ physid_mask_t phys_cpu_present_map; #if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_SMP) /* * Copy data used in early init routines from the initial arrays to the Loading arch/x86/kernel/smpboot.c +0 −3 Original line number Diff line number Diff line Loading @@ -88,9 +88,6 @@ u8 apicid_2_node[MAX_APICID]; /* Internal processor count */ unsigned int num_processors; /* Bitmask of physically existing CPUs */ physid_mask_t phys_cpu_present_map; /* State of each CPU */ DEFINE_PER_CPU(int, cpu_state) = { 0 }; Loading Loading
arch/x86/kernel/mpparse_32.c +0 −5 Original line number Diff line number Diff line Loading @@ -69,11 +69,6 @@ unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP physid_mask_t phys_cpu_present_map; #endif /* * Intel MP BIOS table parsing routines: */ Loading
arch/x86/kernel/mpparse_64.c +0 −5 Original line number Diff line number Diff line Loading @@ -70,11 +70,6 @@ unsigned int boot_cpu_physical_apicid = -1U; #endif #endif /* Make it easy to share the UP and SMP code: */ #ifndef CONFIG_X86_SMP physid_mask_t phys_cpu_present_map; #endif /* * Intel MP BIOS table parsing routines: */ Loading
arch/x86/kernel/setup.c +4 −0 Original line number Diff line number Diff line Loading @@ -9,11 +9,15 @@ #include <asm/processor.h> #include <asm/setup.h> #include <asm/topology.h> #include <asm/mpspec.h> #include <asm/apicdef.h> DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID; EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid); /* Bitmask of physically existing CPUs */ physid_mask_t phys_cpu_present_map; #if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_SMP) /* * Copy data used in early init routines from the initial arrays to the Loading
arch/x86/kernel/smpboot.c +0 −3 Original line number Diff line number Diff line Loading @@ -88,9 +88,6 @@ u8 apicid_2_node[MAX_APICID]; /* Internal processor count */ unsigned int num_processors; /* Bitmask of physically existing CPUs */ physid_mask_t phys_cpu_present_map; /* State of each CPU */ DEFINE_PER_CPU(int, cpu_state) = { 0 }; Loading