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Commit 0f5fd60a authored by Pavan Anamula's avatar Pavan Anamula
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mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset



There is a rare scenario in HW, where the first clear pulse could
be lost when the actual reset and clear/read of status register
are happening at the same time. Fix this by retrying upto 10 times
to ensure the status register gets cleared. Otherwise, this will
lead to a spurious power IRQ which results in system instability.

Change-Id: I1c4f27e131992ef036ebe64fbb2c52613ba396cc
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
Signed-off-by: default avatarPavan Anamula <pavana@codeaurora.org>
parent 98ae6423
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