Loading drivers/video/msm/mdss/mdss_dsi.h +2 −2 Original line number Diff line number Diff line Loading @@ -565,7 +565,7 @@ void mdss_dsi_cmd_mode_ctrl(int enable); void mdp4_dsi_cmd_trigger(void); void mdss_dsi_cmd_mdp_start(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_bta_sw_trigger(struct mdss_panel_data *pdata); void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl); bool mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl); int mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, void *clk_handle, enum mdss_dsi_clk_type clk_type, enum mdss_dsi_clk_state clk_state); void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl, Loading Loading @@ -627,7 +627,7 @@ int mdss_dsi_bta_status_check(struct mdss_dsi_ctrl_pdata *ctrl); int mdss_dsi_reg_status_check(struct mdss_dsi_ctrl_pdata *ctrl); bool __mdss_dsi_clk_enabled(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type); void mdss_dsi_ctrl_setup(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en); bool mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en); void mdss_dsi_lp_cd_rx(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_get_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_read_phy_revision(struct mdss_dsi_ctrl_pdata *ctrl); Loading drivers/video/msm/mdss/mdss_dsi_host.c +41 −14 Original line number Diff line number Diff line Loading @@ -2784,10 +2784,11 @@ static int dsi_event_thread(void *data) return 0; } void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) bool mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2805,16 +2806,20 @@ void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) */ if (ctrl->panel_data.panel_info.esd_check_enabled && (ctrl->status_mode == ESD_BTA) && (status & 0x1008000)) return; return false; pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2825,13 +2830,17 @@ void mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x0110) dsi_send_events(ctrl, DSI_EV_LP_RX_TIMEOUT, 0); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) bool mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2842,13 +2851,17 @@ void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) if (print_en) pr_err("%s: status=%x\n", __func__, status); ctrl->err_cont.phy_err_cnt++; ret = true; } return ret; } void mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2868,13 +2881,17 @@ void mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x11110000) /* DLN_FIFO_EMPTY */ dsi_send_events(ctrl, DSI_EV_DSI_FIFO_EMPTY, 0); ctrl->err_cont.fifo_err_cnt++; ret = true; } return ret; } void mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2883,13 +2900,17 @@ void mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x80000000) { /* INTERLEAVE_OP_CONTENTION */ MIPI_OUTP(base + 0x0008, status); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; status = MIPI_INP(base + 0x0120);/* DSI_CLK_STATUS */ Loading @@ -2898,7 +2919,10 @@ void mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) MIPI_OUTP(base + 0x0120, status); dsi_send_events(ctrl, DSI_EV_PLL_UNLOCKED, 0); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } static void __dsi_error_counter(struct dsi_err_container *err_container) Loading Loading @@ -2928,6 +2952,7 @@ static void __dsi_error_counter(struct dsi_err_container *err_container) void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) { u32 intr, mask; bool err_handled = false; /* Ignore the interrupt if the error intr mask is not set */ mask = MIPI_INP(ctrl->ctrl_base + 0x0110); Loading @@ -2941,12 +2966,12 @@ void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) mdss_dsi_err_intr_ctrl(ctrl, DSI_INTR_ERROR_MASK, 0); /* DSI_ERR_INT_MASK0 */ mdss_dsi_clk_status(ctrl); /* Mask0, 0x10000000 */ mdss_dsi_fifo_status(ctrl); /* mask0, 0x133d00 */ mdss_dsi_ack_err_status(ctrl); /* mask0, 0x01f */ mdss_dsi_timeout_status(ctrl); /* mask0, 0x0e0 */ mdss_dsi_status(ctrl); /* mask0, 0xc0100 */ mdss_dsi_dln0_phy_err(ctrl, true); /* mask0, 0x3e00000 */ err_handled |= mdss_dsi_clk_status(ctrl); /* Mask0, 0x10000000 */ err_handled |= mdss_dsi_fifo_status(ctrl); /* mask0, 0x133d00 */ err_handled |= mdss_dsi_ack_err_status(ctrl); /* mask0, 0x01f */ err_handled |= mdss_dsi_timeout_status(ctrl); /* mask0, 0x0e0 */ err_handled |= mdss_dsi_status(ctrl); /* mask0, 0xc0100 */ err_handled |= mdss_dsi_dln0_phy_err(ctrl, true);/* mask0, 0x3e00000 */ /* clear dsi error interrupt */ intr = MIPI_INP(ctrl->ctrl_base + 0x0110); Loading @@ -2954,7 +2979,9 @@ void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) intr |= DSI_INTR_ERROR; MIPI_OUTP(ctrl->ctrl_base + 0x0110, intr); if (err_handled) __dsi_error_counter(&ctrl->err_cont); dsi_send_events(ctrl, DSI_EV_MDP_BUSY_RELEASE, 0); } Loading Loading
drivers/video/msm/mdss/mdss_dsi.h +2 −2 Original line number Diff line number Diff line Loading @@ -565,7 +565,7 @@ void mdss_dsi_cmd_mode_ctrl(int enable); void mdp4_dsi_cmd_trigger(void); void mdss_dsi_cmd_mdp_start(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_bta_sw_trigger(struct mdss_panel_data *pdata); void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl); bool mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl); int mdss_dsi_clk_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, void *clk_handle, enum mdss_dsi_clk_type clk_type, enum mdss_dsi_clk_state clk_state); void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl, Loading Loading @@ -627,7 +627,7 @@ int mdss_dsi_bta_status_check(struct mdss_dsi_ctrl_pdata *ctrl); int mdss_dsi_reg_status_check(struct mdss_dsi_ctrl_pdata *ctrl); bool __mdss_dsi_clk_enabled(struct mdss_dsi_ctrl_pdata *ctrl, u8 clk_type); void mdss_dsi_ctrl_setup(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en); bool mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en); void mdss_dsi_lp_cd_rx(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_get_hw_revision(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_read_phy_revision(struct mdss_dsi_ctrl_pdata *ctrl); Loading
drivers/video/msm/mdss/mdss_dsi_host.c +41 −14 Original line number Diff line number Diff line Loading @@ -2784,10 +2784,11 @@ static int dsi_event_thread(void *data) return 0; } void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) bool mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2805,16 +2806,20 @@ void mdss_dsi_ack_err_status(struct mdss_dsi_ctrl_pdata *ctrl) */ if (ctrl->panel_data.panel_info.esd_check_enabled && (ctrl->status_mode == ESD_BTA) && (status & 0x1008000)) return; return false; pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2825,13 +2830,17 @@ void mdss_dsi_timeout_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x0110) dsi_send_events(ctrl, DSI_EV_LP_RX_TIMEOUT, 0); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) bool mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2842,13 +2851,17 @@ void mdss_dsi_dln0_phy_err(struct mdss_dsi_ctrl_pdata *ctrl, bool print_en) if (print_en) pr_err("%s: status=%x\n", __func__, status); ctrl->err_cont.phy_err_cnt++; ret = true; } return ret; } void mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2868,13 +2881,17 @@ void mdss_dsi_fifo_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x11110000) /* DLN_FIFO_EMPTY */ dsi_send_events(ctrl, DSI_EV_DSI_FIFO_EMPTY, 0); ctrl->err_cont.fifo_err_cnt++; ret = true; } return ret; } void mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; Loading @@ -2883,13 +2900,17 @@ void mdss_dsi_status(struct mdss_dsi_ctrl_pdata *ctrl) if (status & 0x80000000) { /* INTERLEAVE_OP_CONTENTION */ MIPI_OUTP(base + 0x0008, status); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } void mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) static bool mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) { u32 status; unsigned char *base; bool ret = false; base = ctrl->ctrl_base; status = MIPI_INP(base + 0x0120);/* DSI_CLK_STATUS */ Loading @@ -2898,7 +2919,10 @@ void mdss_dsi_clk_status(struct mdss_dsi_ctrl_pdata *ctrl) MIPI_OUTP(base + 0x0120, status); dsi_send_events(ctrl, DSI_EV_PLL_UNLOCKED, 0); pr_err("%s: status=%x\n", __func__, status); ret = true; } return ret; } static void __dsi_error_counter(struct dsi_err_container *err_container) Loading Loading @@ -2928,6 +2952,7 @@ static void __dsi_error_counter(struct dsi_err_container *err_container) void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) { u32 intr, mask; bool err_handled = false; /* Ignore the interrupt if the error intr mask is not set */ mask = MIPI_INP(ctrl->ctrl_base + 0x0110); Loading @@ -2941,12 +2966,12 @@ void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) mdss_dsi_err_intr_ctrl(ctrl, DSI_INTR_ERROR_MASK, 0); /* DSI_ERR_INT_MASK0 */ mdss_dsi_clk_status(ctrl); /* Mask0, 0x10000000 */ mdss_dsi_fifo_status(ctrl); /* mask0, 0x133d00 */ mdss_dsi_ack_err_status(ctrl); /* mask0, 0x01f */ mdss_dsi_timeout_status(ctrl); /* mask0, 0x0e0 */ mdss_dsi_status(ctrl); /* mask0, 0xc0100 */ mdss_dsi_dln0_phy_err(ctrl, true); /* mask0, 0x3e00000 */ err_handled |= mdss_dsi_clk_status(ctrl); /* Mask0, 0x10000000 */ err_handled |= mdss_dsi_fifo_status(ctrl); /* mask0, 0x133d00 */ err_handled |= mdss_dsi_ack_err_status(ctrl); /* mask0, 0x01f */ err_handled |= mdss_dsi_timeout_status(ctrl); /* mask0, 0x0e0 */ err_handled |= mdss_dsi_status(ctrl); /* mask0, 0xc0100 */ err_handled |= mdss_dsi_dln0_phy_err(ctrl, true);/* mask0, 0x3e00000 */ /* clear dsi error interrupt */ intr = MIPI_INP(ctrl->ctrl_base + 0x0110); Loading @@ -2954,7 +2979,9 @@ void mdss_dsi_error(struct mdss_dsi_ctrl_pdata *ctrl) intr |= DSI_INTR_ERROR; MIPI_OUTP(ctrl->ctrl_base + 0x0110, intr); if (err_handled) __dsi_error_counter(&ctrl->err_cont); dsi_send_events(ctrl, DSI_EV_MDP_BUSY_RELEASE, 0); } Loading