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Commit 0f277205 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ASoC: msm: Remove bitclk configure in mi2s slave mode"

parents e62695c5 89dded9a

Documentation/devicetree/bindings/sound/qcom-audio-dev.txt

+120 −10
Original line number Diff line number Diff line
@@ -1019,6 +1019,118 @@ qcom,msm-dai-mi2s { 
		};

};



* prim-master-pinctrl



Required properties:

 - compatible : "qcom,wcd-gpio-ctrl"

 - pinctrl-names: Pinctrl state names for each pin group

					configuration.

- pinctrl-x: Defines pinctrl state for each pin group



Optional properties:

 - qcom,mi2s-auxpcm-cdc-gpios: This boolean property is

				added if GPIOs are under MI2S/AUXPCM TLMM



Example:



prim_master: prim_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_master

				&pri_sck_active_master

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

};



* prim-slave-pinctrl



Required properties:

 - compatible : "qcom,wcd-gpio-ctrl"

 - pinctrl-names: Pinctrl state names for each pin group

					configuration.

- pinctrl-x: Defines pinctrl state for each pin group



Optional properties:

 - qcom,mi2s-auxpcm-cdc-gpios: This boolean property is

				added if GPIOs are under MI2S/AUXPCM TLMM



Example:



prim_slave: prim_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_slave

				&pri_sck_active_slave

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

};



* sec_master_pinctrl



Required properties:

 - compatible : "qcom,wcd-gpio-ctrl"

 - pinctrl-names: Pinctrl state names for each pin group

					configuration.

- pinctrl-x: Defines pinctrl state for each pin group



Optional properties:

 - qcom,mi2s-auxpcm-cdc-gpios: This boolean property is

				added if GPIOs are under MI2S/AUXPCM TLMM



Example:



sec_master: sec_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_master

				&sec_sck_active_master

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

};



* sec_slave_pinctrl



Required properties:

 - compatible : "qcom,wcd-gpio-ctrl"

 - pinctrl-names: Pinctrl state names for each pin group

					configuration.

- pinctrl-x: Defines pinctrl state for each pin group



Optional properties:

 - qcom,mi2s-auxpcm-cdc-gpios: This boolean property is

				added if GPIOs are under MI2S/AUXPCM TLMM



Example:



sec_slave: sec_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_slave

				&sec_sck_active_slave

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



* msm-adsp-loader



Required properties:
@@ -1931,6 +2043,10 @@ Each entry is a pair of strings, the first being the connection's sink, 
the second being the connection's source.

- qcom,codec-mclk-clk-freq : Master clock value given to codec. Some WCD9XXX

codec can run at different mclk values. Mclk value can be 9.6MHz or 12.288MHz.

- qcom,prim_mi2s_aux_master : Handle to prim_master pinctrl configurations

- qcom,prim_mi2s_aux_slave : Handle to prim_slave pinctrl configurations

- qcom,sec_mi2s_aux_master : Handle to sec_master pinctrl configurations

- qcom,sec_mi2s_aux_slave : Handle to sec_slave pinctrl configurations

- asoc-platform: This is phandle list containing the references to platform device

		 nodes that are used as part of the sound card dai-links.

- asoc-platform-names: This property contains list of platform names. The order of
@@ -1949,14 +2065,6 @@ codec can run at different mclk values. Mclk value can be 9.6MHz or 12.288MHz. 
		    codec dai names should match to that of the phandle order given

		    in "asoc-codec".



Optional Properties:

- qcom,mi2s-interface-mode: This property contains mi2s interface modes master/ slave.

			    Entry is a pair of strings, the first being for primary mi2s

			    and the second for secondary mi2s and so on

- qcom,auxpcm-interface-mode: This property contains auxpcm interface modes master/ slave.

			      Entry is a pair of strings, the first being for primary auxpcm

			      and the second for secondary auxpcm and so on



Example:



sound-9330 {
@@ -1980,8 +2088,10 @@ sound-9330 { 
			"MIC BIAS3 External", "Digital Mic3";



		qcom,tomtom-mclk-clk-freq = <12288000>;

		qcom,mi2s-interface-mode = "pri_mi2s_master", "sec_mi2s_master";

		qcom,auxpcm-interface-mode = "pri_pcm_master", "sec_pcm_master";

		qcom,prim_mi2s_aux_master = <&prim_master>;

		qcom,prim_mi2s_aux_slave = <&prim_slave>;

		qcom,sec_mi2s_aux_master = <&sec_master>;

		qcom,sec_mi2s_aux_slave = <&sec_slave>;

		asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,

				<&loopback>, <&hostless>, <&afe>, <&routing>,

				<&pcm_dtmf>, <&host_pcm>;

arch/arm/boot/dts/qcom/mdm9607-pinctrl.dtsi

+84 −20
Original line number Diff line number Diff line
@@ -286,12 +286,13 @@ 
		};





		pmx_pri_mi2s {

				pri_mi2s_ws_active: pri_mi2s_ws_active {

		pmx_pri_mi2s_aux {

			pri_ws_active_master: pri_ws_active_master {

				mux {

					pins = "gpio20";

					function = "pri_mi2s_ws_a";

				};



				config {

					pins = "gpio20";

					drive-strength = <8>;   /* 8 MA */
@@ -300,7 +301,7 @@ 
				};

			};



			pri_mi2s_sck_active: pri_mi2s_sck_active {

			pri_sck_active_master: pri_sck_active_master {

				mux {

					pins = "gpio23";

					function = "pri_mi2s_sck_a";
@@ -314,11 +315,38 @@ 
				};

			};



			pri_mi2s_dout_active: pri_mi2s_dout_active {

			pri_ws_active_slave: pri_ws_active_slave {

				mux {

					pins = "gpio20";

					function = "pri_mi2s_ws_a";

				};



				config {

					pins = "gpio20";

					drive-strength = <8>;   /* 8 MA */

					bias-disable;           /* No PULL */

				};

			};



			pri_sck_active_slave: pri_sck_active_slave {

				mux {

					pins = "gpio23";

					function = "pri_mi2s_sck_a";

				};



				config {

					pins = "gpio23";

					drive-strength = <8>;   /* 8 MA */

					bias-disable;           /* No PULL */

				};

			};



			pri_dout_active: pri_dout_active {

				mux {

					pins = "gpio22";

					function = "pri_mi2s_data1_a";

				};



				config {

					pins = "gpio22";

					drive-strength = <8>;   /* 8 MA */
@@ -327,11 +355,12 @@ 
				};

			};



			pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {

			pri_ws_sleep: pri_ws_sleep {

				mux {

					pins = "gpio20";

					function = "pri_mi2s_ws_a";

				};



				config {

					pins = "gpio20";

					drive-strength = <2>;   /* 2 MA */
@@ -339,11 +368,12 @@ 
				};

			};



			pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {

			pri_sck_sleep: pri_sck_sleep {

				mux {

					pins = "gpio23";

					function = "pri_mi2s_sck_a";

				};



				config {

					pins = "gpio23";

					drive-strength = <2>;   /* 2 MA */
@@ -351,7 +381,7 @@ 
				};

			};



			pri_mi2s_dout_sleep: pri_mi2s_dout_sleep {

			pri_dout_sleep: pri_dout_sleep {

				mux {

					pins = "gpio22";

					function = "pri_mi2s_data1_a";
@@ -365,12 +395,13 @@ 
			};

		};



		pmx_pri_mi2s_din {

				pri_mi2s_din_active: pri_mi2s_din_active {

		pmx_pri_mi2s_aux_din {

				pri_din_active: pri_din_active {

				mux {

					pins = "gpio21";

					function = "pri_mi2s_data0_a";

				};



				config {

					pins = "gpio21";

					drive-strength = <8>;   /* 8 MA */
@@ -378,11 +409,12 @@ 
				};

			};



			pri_mi2s_din_sleep: pri_mi2s_din_sleep {

			pri_din_sleep: pri_din_sleep {

				mux {

					pins = "gpio21";

					function = "pri_mi2s_data0_a";

				};



				config {

					pins = "gpio21";

					drive-strength = <2>;   /* 2 MA */
@@ -391,12 +423,13 @@ 
			};

		};



		pmx_sec_mi2s {

			sec_mi2s_ws_active: sec_mi2s_ws_active {

		pmx_sec_mi2s_aux {

			sec_ws_active_master: sec_ws_active_master {

				mux {

					pins = "gpio79";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio79";

					drive-strength = <8>;   /* 8 MA */
@@ -405,7 +438,7 @@ 
				};

			};



			sec_mi2s_sck_active: sec_mi2s_sck_active {

			sec_sck_active_master: sec_sck_active_master {

				mux {

					pins = "gpio78";

					function = "sec_mi2s";
@@ -419,11 +452,38 @@ 
				};

			};



			sec_mi2s_dout_active: sec_mi2s_dout_active {

			sec_ws_active_slave: sec_ws_active_slave {

				mux {

					pins = "gpio79";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio79";

					drive-strength = <8>;   /* 8 MA */

					bias-disable;           /* No PULL */

				};

			};



			sec_sck_active_slave: sec_sck_active_slave {

				mux {

					pins = "gpio78";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio78";

					drive-strength = <8>;   /* 8 MA */

					bias-disable;           /* No PULL */

				};

			};



			sec_dout_active: sec_dout_active {

				mux {

					pins = "gpio77";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio77";

					drive-strength = <8>;   /* 8 MA */
@@ -432,11 +492,12 @@ 
				};

			};



			sec_mi2s_ws_sleep: sec_mi2s_ws_sleep {

			sec_ws_sleep: sec_ws_sleep {

				mux {

					pins = "gpio79";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio79";

					drive-strength = <2>;   /* 2 MA */
@@ -444,11 +505,12 @@ 
				};

			};



			sec_mi2s_sck_sleep: sec_mi2s_sck_sleep {

			sec_sck_sleep: sec_sck_sleep {

				mux {

					pins = "gpio78";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio78";

					drive-strength = <2>;   /* 2 MA */
@@ -456,7 +518,7 @@ 
				};

			};



			sec_mi2s_dout_sleep: sec_mi2s_dout_sleep {

			sec_dout_sleep: sec_dout_sleep {

				mux {

					pins = "gpio77";

					function = "sec_mi2s";
@@ -470,12 +532,13 @@ 
			};

		};



		pmx_sec_mi2s_din {

			sec_mi2s_din_active: sec_mi2s_din_active {

		pmx_sec_mi2s_aux_din {

			sec_din_active: sec_din_active {

				mux {

					pins = "gpio76";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio76";

					drive-strength = <8>;   /* 8 MA */
@@ -483,11 +546,12 @@ 
				};

			};



			sec_mi2s_din_sleep: sec_mi2s_din_sleep {

			sec_din_sleep: sec_din_sleep {

				mux {

					pins = "gpio76";

					function = "sec_mi2s";

				};



				config {

					pins = "gpio76";

					drive-strength = <2>;   /* 2 MA */

arch/arm/boot/dts/qcom/mdm9607.dtsi

+64 −13
Original line number Diff line number Diff line
@@ -871,8 +871,10 @@ 
			"MIC BIAS3 External", "Digital Mic3";



		qcom,codec-mclk-clk-freq = <12288000>;

		qcom,mi2s-interface-mode = "pri_mi2s_master", "sec_mi2s_master";

		qcom,auxpcm-interface-mode = "pri_pcm_master", "sec_pcm_master";

		qcom,prim_mi2s_aux_master = <&prim_master>;

		qcom,prim_mi2s_aux_slave = <&prim_slave>;

		qcom,sec_mi2s_aux_master = <&sec_master>;

		qcom,sec_mi2s_aux_slave = <&sec_slave>;

		asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,

				<&loopback>, <&hostless>, <&afe>, <&routing>,

				<&pcm_dtmf>, <&host_pcm>, <&compress>;
@@ -928,8 +930,10 @@ 
			"MIC BIAS3 External", "Digital Mic4";



		qcom,codec-mclk-clk-freq = <12288000>;

		qcom,mi2s-interface-mode = "pri_mi2s_master", "sec_mi2s_master";

		qcom,auxpcm-interface-mode = "pri_pcm_master", "sec_pcm_master";

		qcom,prim_mi2s_aux_master = <&prim_master>;

		qcom,prim_mi2s_aux_slave = <&prim_slave>;

		qcom,sec_mi2s_aux_master = <&sec_master>;

		qcom,sec_mi2s_aux_slave = <&sec_slave>;

		asoc-platform = <&pcm0>, <&pcm1>, <&voip>, <&voice>,

				<&loopback>, <&hostless>, <&afe>, <&routing>,

				<&pcm_dtmf>, <&host_pcm>, <&compress>;
@@ -1131,15 +1135,6 @@ 
			qcom,msm-dai-q6-mi2s-dev-id = <0>;

			qcom,msm-mi2s-rx-lines = <2>;

			qcom,msm-mi2s-tx-lines = <1>;

			pinctrl-names = "default", "idle";

			pinctrl-0 = <&pri_mi2s_ws_active

					&pri_mi2s_sck_active

					&pri_mi2s_dout_active

					&pri_mi2s_din_active>;

			pinctrl-1 = <&pri_mi2s_ws_sleep

					&pri_mi2s_sck_sleep

					&pri_mi2s_dout_sleep

					&pri_mi2s_din_sleep>;

		};

		mi2s_sec: qcom,msm-dai-q6-mi2s-sec {

			compatible = "qcom,msm-dai-q6-mi2s";
@@ -1149,6 +1144,62 @@ 
		};

	};



	prim_master: prim_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_master

				&pri_sck_active_master

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	prim_slave: prim_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&pri_ws_active_slave

				&pri_sck_active_slave

				&pri_dout_active

				&pri_din_active>;

		pinctrl-1 = <&pri_ws_sleep

				&pri_sck_sleep

				&pri_dout_sleep

				&pri_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	sec_master: sec_master_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_master

				&sec_sck_active_master

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	sec_slave: sec_slave_pinctrl {

		compatible = "qcom,wcd-gpio-ctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&sec_ws_active_slave

				&sec_sck_active_slave

				&sec_dout_active

				&sec_din_active>;

		pinctrl-1 = <&sec_ws_sleep

				&sec_sck_sleep

				&sec_dout_sleep

				&sec_din_sleep>;

		qcom,mi2s-auxpcm-cdc-gpios;

	};



	qcom,msm-thermal {

		compatible = "qcom,msm-thermal";

		qcom,sensor-id = <4>;

sound/soc/msm/mdm9607.c

+322 −167

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