Loading drivers/thermal/msm-tsens.c +51 −20 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <linux/of.h> #include <linux/debugfs.h> #include <linux/vmalloc.h> #include <asm/arch_timer.h> #define CREATE_TRACE_POINTS #include <trace/trace_thermal.h> Loading Loading @@ -710,12 +711,16 @@ #define TSENS_DBG_BUS_ID_15 15 #define TSENS_DEBUG_LOOP_COUNT_ID_0 30 #define TSENS_DEBUG_LOOP_COUNT 5 #define TSENS_DEBUG_OFFSET_RANGE 20 #define TSENS_DEBUG_STATUS_REG_START 10 #define TSENS_DEBUG_OFFSET_RANGE 16 #define TSENS_DEBUG_OFFSET_WORD1 0x4 #define TSENS_DEBUG_OFFSET_WORD2 0x8 #define TSENS_DEBUG_OFFSET_WORD3 0xc #define TSENS_DEBUG_OFFSET_ROW 0x10 #define TSENS_DEBUG_DECIDEGC -400 #define TSENS_DEBUG_MIN_CYCLE 63000 #define TSENS_DEBUG_MAX_CYCLE 64000 #define TSENS_DEBUG_ID_MASK_1_4 0xffffffe1 static uint32_t tsens_sec_to_msec_value = 3000; static uint32_t tsens_completion_timeout_hz = 2 * HZ; Loading Loading @@ -825,6 +830,12 @@ struct tsens_tm_device { spinlock_t tsens_crit_lock; spinlock_t tsens_upp_low_lock; bool crit_set; unsigned long long crit_timestamp_last_run; unsigned long long crit_timestamp_last_interrupt_handled; unsigned long long crit_timestamp_last_poll_request; u64 qtimer_val_detection_start; u64 qtimer_val_last_detection_interrupt; u64 qtimer_val_last_polling_check; struct tsens_tm_device_sensor sensor[0]; }; Loading Loading @@ -1881,6 +1892,7 @@ static void tsens_poll(struct work_struct *work) struct tsens_tm_device *tmdev = container_of(work, struct tsens_tm_device, tsens_critical_poll_test.work); unsigned int reg_cntl, mask, rc = 0, debug_dump, i = 0, loop = 0; unsigned int debug_id = 0; uint32_t r1, r2, r3, r4, offset = 0; unsigned long temp, flags; unsigned int status, int_mask, int_mask_val; Loading Loading @@ -1914,6 +1926,9 @@ static void tsens_poll(struct work_struct *work) (TSENS_TM_SN_CRITICAL_THRESHOLD(tmdev->tsens_addr) + (mask * TSENS_SN_ADDR_OFFSET))); tmdev->crit_timestamp_last_run = sched_clock(); tmdev->qtimer_val_detection_start = arch_counter_get_cntpct(); spin_lock_irqsave(&tmdev->tsens_crit_lock, flags); tmdev->crit_set = true; reg_cntl = readl_relaxed(TSENS_TM_CRITICAL_INT_MASK(tmdev->tsens_addr)); Loading Loading @@ -1944,6 +1959,9 @@ static void tsens_poll(struct work_struct *work) tmdev->crit_set = false; spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags); tmdev->crit_timestamp_last_poll_request = sched_clock(); tmdev->qtimer_val_last_polling_check = arch_counter_get_cntpct(); if (status & TSENS_TM_SN_STATUS_CRITICAL_STATUS) { spin_lock_irqsave(&tmdev->tsens_crit_lock, flags); Loading @@ -1969,9 +1987,10 @@ static void tsens_poll(struct work_struct *work) loop = 0; i = 0; while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) { writel_relaxed((i << 1) | 1, debug_id = readl_relaxed(debug_id_addr); writel_relaxed((debug_id | (i << 1) | 1), TSENS_DEBUG_CONTROL(tmdev->tsens_addr)); while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) { debug_dump = readl_relaxed(debug_data_addr); r1 = readl_relaxed(debug_data_addr); r2 = readl_relaxed(debug_data_addr); Loading @@ -1984,15 +2003,16 @@ static void tsens_poll(struct work_struct *work) for (i = TSENS_DBG_BUS_ID_1; i <= TSENS_DBG_BUS_ID_15; i++) { loop = 0; while (loop < TSENS_DEBUG_LOOP_COUNT) { writel_relaxed((i << 1) | 1, debug_id = readl_relaxed(debug_id_addr); debug_id = debug_id & TSENS_DEBUG_ID_MASK_1_4; writel_relaxed((debug_id | (i << 1) | 1), TSENS_DEBUG_CONTROL(tmdev->tsens_addr)); while (loop < TSENS_DEBUG_LOOP_COUNT) { debug_dump = readl_relaxed(debug_data_addr); pr_err("bus-id:%d with value: 0x%x\n", i, debug_dump); loop++; } loop = 0; } pr_err("Start of TSENS TM dump\n"); Loading Loading @@ -2026,21 +2046,29 @@ static void tsens_poll(struct work_struct *work) offset += TSENS_DEBUG_OFFSET_ROW; } offset = 0; pr_err("Start of TSENS TM dump\n"); for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) { loop = 0; while (loop < TSENS_DEBUG_LOOP_COUNT) { offset = TSENS_DEBUG_OFFSET_ROW * TSENS_DEBUG_STATUS_REG_START; pr_err("Start of TSENS TM dump %d\n", loop); /* Limited dump of the registers for the temperature */ for (i = 0; i < TSENS_DEBUG_LOOP_COUNT; i++) { r1 = readl_relaxed(controller_id_addr + offset); r2 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD1)); r3 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD2)); r4 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD3)); r2 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD1)); r3 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD2)); r4 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD3)); pr_err("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", offset, r1, r2, r3, r4); offset += TSENS_DEBUG_OFFSET_ROW; } loop++; usleep_range(TSENS_DEBUG_MIN_CYCLE, TSENS_DEBUG_MAX_CYCLE); } BUG(); } Loading Loading @@ -2305,6 +2333,9 @@ static irqreturn_t tsens_tm_critical_irq_thread(int irq, void *data) } } tm->crit_timestamp_last_interrupt_handled = sched_clock(); tm->qtimer_val_last_detection_interrupt = arch_counter_get_cntpct(); complete(&tm->tsens_rslt_completion); /* Mask critical interrupt */ mb(); Loading Loading
drivers/thermal/msm-tsens.c +51 −20 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <linux/of.h> #include <linux/debugfs.h> #include <linux/vmalloc.h> #include <asm/arch_timer.h> #define CREATE_TRACE_POINTS #include <trace/trace_thermal.h> Loading Loading @@ -710,12 +711,16 @@ #define TSENS_DBG_BUS_ID_15 15 #define TSENS_DEBUG_LOOP_COUNT_ID_0 30 #define TSENS_DEBUG_LOOP_COUNT 5 #define TSENS_DEBUG_OFFSET_RANGE 20 #define TSENS_DEBUG_STATUS_REG_START 10 #define TSENS_DEBUG_OFFSET_RANGE 16 #define TSENS_DEBUG_OFFSET_WORD1 0x4 #define TSENS_DEBUG_OFFSET_WORD2 0x8 #define TSENS_DEBUG_OFFSET_WORD3 0xc #define TSENS_DEBUG_OFFSET_ROW 0x10 #define TSENS_DEBUG_DECIDEGC -400 #define TSENS_DEBUG_MIN_CYCLE 63000 #define TSENS_DEBUG_MAX_CYCLE 64000 #define TSENS_DEBUG_ID_MASK_1_4 0xffffffe1 static uint32_t tsens_sec_to_msec_value = 3000; static uint32_t tsens_completion_timeout_hz = 2 * HZ; Loading Loading @@ -825,6 +830,12 @@ struct tsens_tm_device { spinlock_t tsens_crit_lock; spinlock_t tsens_upp_low_lock; bool crit_set; unsigned long long crit_timestamp_last_run; unsigned long long crit_timestamp_last_interrupt_handled; unsigned long long crit_timestamp_last_poll_request; u64 qtimer_val_detection_start; u64 qtimer_val_last_detection_interrupt; u64 qtimer_val_last_polling_check; struct tsens_tm_device_sensor sensor[0]; }; Loading Loading @@ -1881,6 +1892,7 @@ static void tsens_poll(struct work_struct *work) struct tsens_tm_device *tmdev = container_of(work, struct tsens_tm_device, tsens_critical_poll_test.work); unsigned int reg_cntl, mask, rc = 0, debug_dump, i = 0, loop = 0; unsigned int debug_id = 0; uint32_t r1, r2, r3, r4, offset = 0; unsigned long temp, flags; unsigned int status, int_mask, int_mask_val; Loading Loading @@ -1914,6 +1926,9 @@ static void tsens_poll(struct work_struct *work) (TSENS_TM_SN_CRITICAL_THRESHOLD(tmdev->tsens_addr) + (mask * TSENS_SN_ADDR_OFFSET))); tmdev->crit_timestamp_last_run = sched_clock(); tmdev->qtimer_val_detection_start = arch_counter_get_cntpct(); spin_lock_irqsave(&tmdev->tsens_crit_lock, flags); tmdev->crit_set = true; reg_cntl = readl_relaxed(TSENS_TM_CRITICAL_INT_MASK(tmdev->tsens_addr)); Loading Loading @@ -1944,6 +1959,9 @@ static void tsens_poll(struct work_struct *work) tmdev->crit_set = false; spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags); tmdev->crit_timestamp_last_poll_request = sched_clock(); tmdev->qtimer_val_last_polling_check = arch_counter_get_cntpct(); if (status & TSENS_TM_SN_STATUS_CRITICAL_STATUS) { spin_lock_irqsave(&tmdev->tsens_crit_lock, flags); Loading @@ -1969,9 +1987,10 @@ static void tsens_poll(struct work_struct *work) loop = 0; i = 0; while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) { writel_relaxed((i << 1) | 1, debug_id = readl_relaxed(debug_id_addr); writel_relaxed((debug_id | (i << 1) | 1), TSENS_DEBUG_CONTROL(tmdev->tsens_addr)); while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) { debug_dump = readl_relaxed(debug_data_addr); r1 = readl_relaxed(debug_data_addr); r2 = readl_relaxed(debug_data_addr); Loading @@ -1984,15 +2003,16 @@ static void tsens_poll(struct work_struct *work) for (i = TSENS_DBG_BUS_ID_1; i <= TSENS_DBG_BUS_ID_15; i++) { loop = 0; while (loop < TSENS_DEBUG_LOOP_COUNT) { writel_relaxed((i << 1) | 1, debug_id = readl_relaxed(debug_id_addr); debug_id = debug_id & TSENS_DEBUG_ID_MASK_1_4; writel_relaxed((debug_id | (i << 1) | 1), TSENS_DEBUG_CONTROL(tmdev->tsens_addr)); while (loop < TSENS_DEBUG_LOOP_COUNT) { debug_dump = readl_relaxed(debug_data_addr); pr_err("bus-id:%d with value: 0x%x\n", i, debug_dump); loop++; } loop = 0; } pr_err("Start of TSENS TM dump\n"); Loading Loading @@ -2026,21 +2046,29 @@ static void tsens_poll(struct work_struct *work) offset += TSENS_DEBUG_OFFSET_ROW; } offset = 0; pr_err("Start of TSENS TM dump\n"); for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) { loop = 0; while (loop < TSENS_DEBUG_LOOP_COUNT) { offset = TSENS_DEBUG_OFFSET_ROW * TSENS_DEBUG_STATUS_REG_START; pr_err("Start of TSENS TM dump %d\n", loop); /* Limited dump of the registers for the temperature */ for (i = 0; i < TSENS_DEBUG_LOOP_COUNT; i++) { r1 = readl_relaxed(controller_id_addr + offset); r2 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD1)); r3 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD2)); r4 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD3)); r2 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD1)); r3 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD2)); r4 = readl_relaxed(controller_id_addr + (offset + TSENS_DEBUG_OFFSET_WORD3)); pr_err("0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", offset, r1, r2, r3, r4); offset += TSENS_DEBUG_OFFSET_ROW; } loop++; usleep_range(TSENS_DEBUG_MIN_CYCLE, TSENS_DEBUG_MAX_CYCLE); } BUG(); } Loading Loading @@ -2305,6 +2333,9 @@ static irqreturn_t tsens_tm_critical_irq_thread(int irq, void *data) } } tm->crit_timestamp_last_interrupt_handled = sched_clock(); tm->qtimer_val_last_detection_interrupt = arch_counter_get_cntpct(); complete(&tm->tsens_rslt_completion); /* Mask critical interrupt */ mb(); Loading