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Commit 0efc48ec authored by Pawel Moll's avatar Pawel Moll Committed by Russell King
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ARM: 6807/1: realview: Fix secondary GIC initialisation for EB with MPCore tile



The second GIC, present when EB board is used with a MPCore tile,
was initialised starting with irq number 64, which made interrupts
64-95 in the primary GIC unusable.

Signed-off-by: default avatarPawel Moll <pawel.moll@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 16c29daf
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+1 −1
Original line number Diff line number Diff line
@@ -348,7 +348,7 @@ static void __init gic_init_irq(void)

#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
		/* board GIC, secondary */
		gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE),
		gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
			 __io_address(REALVIEW_EB_GIC_CPU_BASE));
		gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
#endif