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Commit 0ee5b802 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Consolidate regulator calls"

parents cee7f345 f862cb36
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+0 −15
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@@ -17,16 +17,6 @@ Required properties:
- interrupt-names:	String property to describe the name of the interrupt.
- qcom,id:		An integer used as an identification number for the device.

- qcom,clk-map:		A bit map value for clocks controlled by kgsl.
				KGSL_CLK_SRC    0x00000001
				KGSL_CLK_CORE   0x00000002
				KGSL_CLK_IFACE  0x00000004
				KGSL_CLK_MEM    0x00000008
				KGSL_CLK_MEM_IFACE 0x00000010
				KGSL_CLK_AXI    0x00000020
				KGSL_CLK_RBBMTIMER 0x00000080
				KGSL_CLK_ALWAYSON 0x00000800

- clocks:		List of phandle and clock specifier pairs, one pair
			for each clock input to the device.
- clock-names:		List of clock input name strings sorted in the same
@@ -155,11 +145,6 @@ Example of A330 GPU in MSM8916:
		qcom,idle-timeout = <8>;
		qcom,strtstp-sleepwake;

		/*
		 * Clocks = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM |
		 * KGSL_CLK_MEM_IFACE | KGSL_CLK_ALT_MEM_IFACE
		 */
		qcom,clk-map = <0x0000005E>;
		clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,
			<&clock_gcc clk_gcc_oxili_ahb_clk>,
			<&clock_gcc clk_gcc_oxili_gmem_clk>,
+0 −5
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@@ -61,11 +61,6 @@
		qcom,idle-timeout = <8>; //<HZ/12>
		qcom,strtstp-sleepwake;

		/* Clocks = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM |
		KGSL_CLK_MEM_IFACE | KGSL_CLK_ALT_MEM_IFACE
		KGSL_CLK_RBBMTIMER */
		qcom,clk-map = <0x000001DE>;

		clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,
			<&clock_gcc clk_gcc_oxili_ahb_clk>,
			<&clock_gcc clk_gcc_oxili_gmem_clk>,
+0 −8
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@@ -83,14 +83,6 @@
		coresight-child-list = <&funnel_in0>;
		coresight-child-ports = <4>;

		/*
		 * Clocks = KGSL_CLK_CORE | KGSL_CLK_IFACE
		 * KGSL_CLK_RBBMTIMER | KGSL_CLK_MEM_IFACE
		 * KGSL_CLK_ALT_MEM_IFACE | KGSL_CLK_MEM |
		 * KGSL_CLK_MX
		 */
		qcom,clk-map = <0x000004DE>;

		clocks = <&clock_gpu clk_gpu_gx_gfx3d_clk>,
			<&clock_gpu clk_gpu_ahb_clk>,
			<&clock_gpu clk_gpu_gx_rbbmtimer_clk>,
+1 −0
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@@ -400,6 +400,7 @@

	/* Quirks */
	qcom,gpu-quirk-two-pass-use-wfi;
	qcom,gpu-quirk-iommu-sync;

	/* Power levels */
	qcom,gpu-pwrlevels {
+1 −2
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@@ -139,7 +139,6 @@ static const struct adreno_gpu_core adreno_gpulist[] = {
		.major = 3,
		.minor = 0,
		.patchid = 0,
		.features = ADRENO_SYNC_SMMU_PC,
		.pm4fw_name = "a530v1_pm4.fw",
		.pfpfw_name = "a530v1_pfp.fw",
		.gpudev = &adreno_a5xx_gpudev,
@@ -154,7 +153,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = {
		.minor = 0,
		.patchid = 1,
		.features = ADRENO_GPMU | ADRENO_SPTP_PC | ADRENO_LM |
			ADRENO_PREEMPTION | ADRENO_SYNC_SMMU_PC | ADRENO_64BIT |
			ADRENO_PREEMPTION | ADRENO_64BIT |
			ADRENO_CONTENT_PROTECTION,
		.pm4fw_name = "a530_pm4.fw",
		.pfpfw_name = "a530_pfp.fw",
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