Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0e71a6df authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
Browse files

clk: msm: clock-pll: Add test_ctl_dbg flag to configure test bits 



The PLL hardware configuration does not mandate to modify the test control
bits of the PLL, in those cases introduce a flag which when present will
skip configuration of the test control bits.

Change-Id: I70588398cffae193d56cb510faa19b1f96f05fea
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 566d1d5d
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment