Loading arch/arm/boot/dts/qcom/mdm9640.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -357,13 +357,14 @@ clock-names = "core_clk"; clocks = <&clock_gcc clk_ipa_clk>; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <90 512 0 0>, <90 585 0 0>, /* No vote */ <90 512 80000 640000>, <90 585 80000 640000>, /* SVS */ <90 512 206000 960000>, <90 585 206000 960000>; /* PERF */ qcom,bus-vector-names = "MIN", "SVS", "PERF"; <90 512 206000 960000>, <90 585 206000 960000>, /* NOMINAL */ <90 512 206000 3600000>, <90 585 206000 3600000>; /* TURBO */ qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; }; qcom,rmnet-ipa { Loading Loading
arch/arm/boot/dts/qcom/mdm9640.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -357,13 +357,14 @@ clock-names = "core_clk"; clocks = <&clock_gcc clk_ipa_clk>; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <90 512 0 0>, <90 585 0 0>, /* No vote */ <90 512 80000 640000>, <90 585 80000 640000>, /* SVS */ <90 512 206000 960000>, <90 585 206000 960000>; /* PERF */ qcom,bus-vector-names = "MIN", "SVS", "PERF"; <90 512 206000 960000>, <90 585 206000 960000>, /* NOMINAL */ <90 512 206000 3600000>, <90 585 206000 3600000>; /* TURBO */ qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; }; qcom,rmnet-ipa { Loading