Loading Documentation/devicetree/bindings/usb/msm-phy.txt +3 −6 Original line number Diff line number Diff line Loading @@ -156,8 +156,7 @@ Required properties: - phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode. Optional properties: - reg: Address and length register set to control QUSB2 PHY "qscratch_base" : QSCRATCH base register set. - reg-names: Additional registers corresponding with the following: "tune2_efuse_addr": EFUSE based register address to read TUNE2 parameter. via the QSCRATCH interface. "emu_phy_base" : phy base address used for programming emulation target phy. Loading Loading @@ -192,10 +191,8 @@ Optional properties: Example: qusb_phy: qusb@f9b39000 { compatible = "qcom,qusb2phy"; reg = <0x00079000 0x7000>, <0x08af8800 0x400>; reg-names = "qusb_phy_base", "qscratch_base"; reg = <0x00079000 0x7000>; reg-names = "qusb_phy_base"; vdd-supply = <&pm8994_s2_corner>; vdda18-supply = <&pm8994_l6>; vdda33-supply = <&pm8994_l24>; Loading arch/arm/boot/dts/qcom/mdm9640-v1-mtp.dts +0 −2 Original line number Diff line number Diff line Loading @@ -26,10 +26,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000580d4 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading arch/arm/boot/dts/qcom/mdm9640-v1-pmk8001-mtp.dts +0 −2 Original line number Diff line number Diff line Loading @@ -27,10 +27,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000580d4 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading arch/arm/boot/dts/qcom/mdm9640-v2.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -50,10 +50,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000a020c 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +1 −3 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -63,10 +63,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x08a0cd00 0x40>; reg-names = "qusb_phy_base", "qscratch_base", "emu_phy_base"; qcom,emulation; qcom,qusb-phy-init-seq = <0x19 0x404 Loading Loading
Documentation/devicetree/bindings/usb/msm-phy.txt +3 −6 Original line number Diff line number Diff line Loading @@ -156,8 +156,7 @@ Required properties: - phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode. Optional properties: - reg: Address and length register set to control QUSB2 PHY "qscratch_base" : QSCRATCH base register set. - reg-names: Additional registers corresponding with the following: "tune2_efuse_addr": EFUSE based register address to read TUNE2 parameter. via the QSCRATCH interface. "emu_phy_base" : phy base address used for programming emulation target phy. Loading Loading @@ -192,10 +191,8 @@ Optional properties: Example: qusb_phy: qusb@f9b39000 { compatible = "qcom,qusb2phy"; reg = <0x00079000 0x7000>, <0x08af8800 0x400>; reg-names = "qusb_phy_base", "qscratch_base"; reg = <0x00079000 0x7000>; reg-names = "qusb_phy_base"; vdd-supply = <&pm8994_s2_corner>; vdda18-supply = <&pm8994_l6>; vdda33-supply = <&pm8994_l24>; Loading
arch/arm/boot/dts/qcom/mdm9640-v1-mtp.dts +0 −2 Original line number Diff line number Diff line Loading @@ -26,10 +26,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000580d4 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading
arch/arm/boot/dts/qcom/mdm9640-v1-pmk8001-mtp.dts +0 −2 Original line number Diff line number Diff line Loading @@ -27,10 +27,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000580d4 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading
arch/arm/boot/dts/qcom/mdm9640-v2.dtsi +0 −2 Original line number Diff line number Diff line Loading @@ -50,10 +50,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x000a020c 0x4>; reg-names = "qusb_phy_base", "qscratch_base", "tune2_efuse_addr"; qcom,tune2-efuse-bit-pos = <20>; qcom,tune2-efuse-num-bits = <4>; Loading
arch/arm/boot/dts/qcom/mdmcalifornium-rumi.dts +1 −3 Original line number Diff line number Diff line /* Copyright (c) 2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -63,10 +63,8 @@ &qusb_phy { reg = <0x00079000 0x180>, <0x08af8800 0x400>, <0x08a0cd00 0x40>; reg-names = "qusb_phy_base", "qscratch_base", "emu_phy_base"; qcom,emulation; qcom,qusb-phy-init-seq = <0x19 0x404 Loading