Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0bcf6811 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: camera: isp: Disable camif error interrupt"

parents 6eab15e2 885e7880
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -140,6 +140,7 @@ struct msm_vfe_irq_ops {
	void (*process_stats_irq)(struct vfe_device *vfe_dev,
		uint32_t irq_status0, uint32_t irq_status1,
		struct msm_isp_timestamp *ts);
	void (*enable_camif_err)(struct vfe_device *vfe_dev, int enable);
};

struct msm_vfe_axi_ops {
+26 −2
Original line number Diff line number Diff line
@@ -537,10 +537,12 @@ static void msm_vfe40_process_violation_status(
static void msm_vfe40_process_error_status(struct vfe_device *vfe_dev)
{
	uint32_t error_status1 = vfe_dev->error_info.error_mask1;
	if (error_status1 & (1 << 0))
	if (error_status1 & (1 << 0)) {
		pr_err_ratelimited("%s: vfe %d camif error status: 0x%x\n",
			__func__, vfe_dev->pdev->id,
			vfe_dev->error_info.camif_status);
		msm_camera_io_dump(vfe_dev->vfe_base + 0x2F4, 0x30, 1);
	}
	if (error_status1 & (1 << 1))
		pr_err_ratelimited("%s: stats bhist overwrite\n", __func__);
	if (error_status1 & (1 << 2))
@@ -630,9 +632,23 @@ static void msm_vfe40_process_error_status(struct vfe_device *vfe_dev)
		msm_isp_util_update_last_overflow_ab_ib(vfe_dev);
}

static void msm_vfe40_enable_camif_error(struct vfe_device *vfe_dev,
			int enable)
{
	uint32_t val;

	val = msm_camera_io_r(vfe_dev->vfe_base + 0x2C);
	if (enable)
		msm_camera_io_w_mb(val | BIT(0), vfe_dev->vfe_base + 0x2C);
	else
		msm_camera_io_w_mb(val & ~(BIT(0)), vfe_dev->vfe_base + 0x2C);
}

static void msm_vfe40_read_irq_status(struct vfe_device *vfe_dev,
	uint32_t *irq_status0, uint32_t *irq_status1)
{
	uint32_t irq_mask0, irq_mask1;

	*irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x38);
	*irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x3C);
	/*
@@ -648,9 +664,16 @@ static void msm_vfe40_read_irq_status(struct vfe_device *vfe_dev,
		*irq_status0 &= ~(0x18000000);
	}

	if (*irq_status1 & (1 << 0))
	irq_mask0 = msm_camera_io_r(vfe_dev->vfe_base + 0x28);
	irq_mask1 = msm_camera_io_r(vfe_dev->vfe_base + 0x2C);
	*irq_status0 &= irq_mask0;
	*irq_status1 &= irq_mask1;

	if (*irq_status1 & (1 << 0)) {
		vfe_dev->error_info.camif_status =
		msm_camera_io_r(vfe_dev->vfe_base + 0x31C);
		msm_vfe40_enable_camif_error(vfe_dev, 0);
	}

	if (*irq_status1 & (1 << 7))
		vfe_dev->error_info.violation_status |=
@@ -2281,6 +2304,7 @@ struct msm_vfe_hardware_info vfe40_hw_info = {
			.process_axi_irq = msm_isp_process_axi_irq,
			.process_stats_irq = msm_isp_process_stats_irq,
			.process_epoch_irq = msm_vfe40_process_epoch_irq,
			.enable_camif_err = msm_vfe40_enable_camif_error,
		},
		.axi_ops = {
			.reload_wm = msm_vfe40_axi_reload_wm,
+16 −1
Original line number Diff line number Diff line
@@ -468,6 +468,18 @@ static void msm_vfe44_process_error_status(struct vfe_device *vfe_dev)
	}
}

static void msm_vfe44_enable_camif_error(struct vfe_device *vfe_dev,
			int enable)
{
	uint32_t val;

	val = msm_camera_io_r(vfe_dev->vfe_base + 0x2C);
	if (enable)
		msm_camera_io_w_mb(val | BIT(0), vfe_dev->vfe_base + 0x2C);
	else
		msm_camera_io_w_mb(val & ~(BIT(0)), vfe_dev->vfe_base + 0x2C);
}

static void msm_vfe44_read_irq_status(struct vfe_device *vfe_dev,
	uint32_t *irq_status0, uint32_t *irq_status1)
{
@@ -488,9 +500,11 @@ static void msm_vfe44_read_irq_status(struct vfe_device *vfe_dev,
		*irq_status0 &= ~(0x10000000);
	}

	if (*irq_status1 & (1 << 0))
	if (*irq_status1 & (1 << 0)) {
		vfe_dev->error_info.camif_status =
		msm_camera_io_r(vfe_dev->vfe_base + 0x31C);
		msm_vfe44_enable_camif_error(vfe_dev, 0);
	}

	if (*irq_status1 & (1 << 7))
		vfe_dev->error_info.violation_status =
@@ -1961,6 +1975,7 @@ struct msm_vfe_hardware_info vfe44_hw_info = {
			.process_axi_irq = msm_isp_process_axi_irq,
			.process_stats_irq = msm_isp_process_stats_irq,
			.process_epoch_irq = msm_vfe44_process_epoch_irq,
			.enable_camif_err = msm_vfe44_enable_camif_error,
		},
		.axi_ops = {
			.reload_wm = msm_vfe44_axi_reload_wm,
+26 −2
Original line number Diff line number Diff line
@@ -356,9 +356,11 @@ static void msm_vfe46_process_error_status(struct vfe_device *vfe_dev)
{
	uint32_t error_status1 = vfe_dev->error_info.error_mask1;

	if (error_status1 & (1 << 0))
	if (error_status1 & (1 << 0)) {
		pr_err("%s: camif error status: 0x%x\n",
			__func__, vfe_dev->error_info.camif_status);
		msm_camera_io_dump(vfe_dev->vfe_base + 0x3A8, 0x30, 1);
	}
	if (error_status1 & (1 << 1))
		pr_err("%s: stats bhist overwrite\n", __func__);
	if (error_status1 & (1 << 2))
@@ -408,18 +410,39 @@ static void msm_vfe46_process_error_status(struct vfe_device *vfe_dev)
		pr_err("%s: status bf scale bus overflow\n", __func__);
}

static void msm_vfe46_enable_camif_error(struct vfe_device *vfe_dev,
			int enable)
{
	uint32_t val;

	val = msm_camera_io_r(vfe_dev->vfe_base + 0x60);
	if (enable)
		msm_camera_io_w_mb(val | BIT(0), vfe_dev->vfe_base + 0x60);
	else
		msm_camera_io_w_mb(val & ~(BIT(0)), vfe_dev->vfe_base + 0x60);
}

static void msm_vfe46_read_irq_status(struct vfe_device *vfe_dev,
	uint32_t *irq_status0, uint32_t *irq_status1)
{
	uint32_t irq_mask0, irq_mask1;

	*irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C);
	*irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x70);
	msm_camera_io_w(*irq_status0, vfe_dev->vfe_base + 0x64);
	msm_camera_io_w(*irq_status1, vfe_dev->vfe_base + 0x68);
	msm_camera_io_w_mb(1, vfe_dev->vfe_base + 0x58);

	if (*irq_status1 & (1 << 0))
	irq_mask0 = msm_camera_io_r(vfe_dev->vfe_base + 0x5C);
	irq_mask1 = msm_camera_io_r(vfe_dev->vfe_base + 0x60);
	*irq_status0 &= irq_mask0;
	*irq_status1 &= irq_mask1;

	if (*irq_status1 & (1 << 0)) {
		vfe_dev->error_info.camif_status =
		msm_camera_io_r(vfe_dev->vfe_base + 0x3D0);
		msm_vfe46_enable_camif_error(vfe_dev, 0);
	}

	if (*irq_status1 & (1 << 7))
		vfe_dev->error_info.violation_status =
@@ -2056,6 +2079,7 @@ struct msm_vfe_hardware_info vfe46_hw_info = {
			.process_axi_irq = msm_isp_process_axi_irq,
			.process_stats_irq = msm_isp_process_stats_irq,
			.process_epoch_irq = msm_vfe46_process_epoch_irq,
			.enable_camif_err = msm_vfe46_enable_camif_error,
		},
		.axi_ops = {
			.reload_wm = msm_vfe46_axi_reload_wm,
+31 −3
Original line number Diff line number Diff line
@@ -472,9 +472,12 @@ static void msm_vfe47_process_error_status(struct vfe_device *vfe_dev)
{
	uint32_t error_status1 = vfe_dev->error_info.error_mask1;

	if (error_status1 & (1 << 0))
	if (error_status1 & (1 << 0)) {
		pr_err("%s: camif error status: 0x%x\n",
			__func__, vfe_dev->error_info.camif_status);
		/* dump camif registers on camif error */
		msm_camera_io_dump(vfe_dev->vfe_base + 0x478, 0x34, 1);
	}
	if (error_status1 & (1 << 1))
		pr_err("%s: stats bhist overwrite\n", __func__);
	if (error_status1 & (1 << 2))
@@ -526,18 +529,42 @@ static void msm_vfe47_process_error_status(struct vfe_device *vfe_dev)
		pr_err("%s: status dsp error\n", __func__);
}

static void msm_vfe47_enable_camif_error(struct vfe_device *vfe_dev,
			int enable)
{
	uint32_t val;

	val = msm_camera_io_r(vfe_dev->vfe_base + 0x60);
	if (enable)
		msm_camera_io_w_mb(val | BIT(0), vfe_dev->vfe_base + 0x60);
	else
		msm_camera_io_w_mb(val & ~(BIT(0)), vfe_dev->vfe_base + 0x60);
}

static void msm_vfe47_read_irq_status(struct vfe_device *vfe_dev,
	uint32_t *irq_status0, uint32_t *irq_status1)
{
	uint32_t irq_mask0, irq_mask1;

	*irq_status0 = msm_camera_io_r(vfe_dev->vfe_base + 0x6C);
	*irq_status1 = msm_camera_io_r(vfe_dev->vfe_base + 0x70);
	/* Mask off bits that are not enabled */
	msm_camera_io_w(*irq_status0, vfe_dev->vfe_base + 0x64);
	msm_camera_io_w(*irq_status1, vfe_dev->vfe_base + 0x68);
	msm_camera_io_w_mb(1, vfe_dev->vfe_base + 0x58);

	if (*irq_status1 & (1 << 0))
	irq_mask0 = msm_camera_io_r(vfe_dev->vfe_base + 0x5C);
	irq_mask1 = msm_camera_io_r(vfe_dev->vfe_base + 0x60);
	*irq_status0 &= irq_mask0;
	*irq_status1 &= irq_mask1;

	if (!(irq_mask1 & 0x1))
		pr_err("camif error is masked\n");
	if (*irq_status1 & (1 << 0)) {
		vfe_dev->error_info.camif_status =
		msm_camera_io_r(vfe_dev->vfe_base + 0x4A4);
		/* mask off camif error after first occurrance */
		msm_vfe47_enable_camif_error(vfe_dev, 0);
	}

	if (*irq_status1 & (1 << 7))
		vfe_dev->error_info.violation_status =
@@ -2282,6 +2309,7 @@ struct msm_vfe_hardware_info vfe47_hw_info = {
			.process_axi_irq = msm_isp_process_axi_irq,
			.process_stats_irq = msm_isp_process_stats_irq,
			.process_epoch_irq = msm_vfe47_process_epoch_irq,
			.enable_camif_err = msm_vfe47_enable_camif_error,
		},
		.axi_ops = {
			.reload_wm = msm_vfe47_axi_reload_wm,
Loading