Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 (0b7d5170) · Commits · e / devices / android_kernel_xiaomi_markw

arch/arm/mach-mx25/clock.c

+37 −21

Original line number	Diff line number	Diff line
		@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk)
		return get_rate_per(8);
		}

		static unsigned long get_rate_gpt(struct clk *clk)
		{
		return get_rate_per(5);
		}

		static unsigned long get_rate_otg(struct clk *clk)
		{
		return 48000000; /* FIXME */
		@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk)
		__raw_writel(reg, clk->enable_reg);
		}

		#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
		#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
		static struct clk name = { \
		.id = i, \
		.enable_reg = CRM_BASE + er, \
		@@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk)
		.set_rate = sr, \
		.enable = clk_cgcr_enable, \
		.disable = clk_cgcr_disable, \
		.secondary = s, \
		}

		DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL);
		DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL);
		DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL);
		DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL);
		DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL);
		DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL);
		DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL);
		DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL);
		DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL);
		DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL);
		DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);
		DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL);
		DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL);
		DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL);
		DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
		DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
		DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
		DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
		DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
		DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
		DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
		DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
		DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
		DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
		DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
		DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
		DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
		DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
		DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
		DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
		DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
		DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);

		#define _REGISTER_CLOCK(d, n, c) \
		{ \
		@@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = {
		_REGISTER_CLOCK("fec.0", NULL, fec_clk)
		};

		int __init mx25_clocks_init(unsigned long fref)
		int __init mx25_clocks_init(void)
		{
		int i;

		for (i = 0; i < ARRAY_SIZE(lookups); i++)
		clkdev_add(&lookups[i]);

		/* Turn off all clocks except the ones we need to survive, namely:
		* EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
		* SCC
		*/
		__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
		__raw_writel((0xf << 16) \| (3 << 26), CRM_BASE + CCM_CGCR1);
		__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);

		mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);

		return 0;

arch/arm/mach-mx25/mx25pdk.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -91,7 +91,7 @@ static void __init mx25pdk_init(void)

		static void __init mx25pdk_timer_init(void)
		{
		mx25_clocks_init(26000000);
		mx25_clocks_init();
		}

		static struct sys_timer mx25pdk_timer = {

arch/arm/mach-mx3/mx31ads.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq)
		}

		static struct irq_chip expio_irq_chip = {
		.name = "EXPIO(CPLD)",
		.ack = expio_ack_irq,
		.mask = expio_mask_irq,
		.unmask = expio_unmask_irq,
		@@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = {
		.min_uV = 2800000,
		.max_uV = 2800000,
		.valid_modes_mask = REGULATOR_MODE_NORMAL,
		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
		.apply_uV = 1,
		},
		};
		@@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = {
		.min_uV = 3300000,
		.max_uV = 3300000,
		.valid_modes_mask = REGULATOR_MODE_NORMAL,
		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
		.apply_uV = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
		@@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)

		static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {
		.init = mx31_wm8350_init,
		.irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES,
		};
		#endif

arch/arm/plat-mxc/audmux-v2.c

+137 −0

Original line number	Diff line number	Diff line
		@@ -23,6 +23,7 @@
		#include <linux/err.h>
		#include <linux/io.h>
		#include <linux/clk.h>
		#include <linux/debugfs.h>
		#include <mach/audmux.h>
		#include <mach/hardware.h>

		@@ -32,6 +33,140 @@ static void __iomem *audmux_base;
		#define MXC_AUDMUX_V2_PTCR(x) ((x) * 8)
		#define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)

		#ifdef CONFIG_DEBUG_FS
		static struct dentry *audmux_debugfs_root;

		static int audmux_open_file(struct inode inode, struct file file)
		{
		file->private_data = inode->i_private;
		return 0;
		}

		/* There is an annoying discontinuity in the SSI numbering with regard
		* to the Linux number of the devices */
		static const char *audmux_port_string(int port)
		{
		switch (port) {
		case MX31_AUDMUX_PORT1_SSI0:
		return "imx-ssi.0";
		case MX31_AUDMUX_PORT2_SSI1:
		return "imx-ssi.1";
		case MX31_AUDMUX_PORT3_SSI_PINS_3:
		return "SSI3";
		case MX31_AUDMUX_PORT4_SSI_PINS_4:
		return "SSI4";
		case MX31_AUDMUX_PORT5_SSI_PINS_5:
		return "SSI5";
		case MX31_AUDMUX_PORT6_SSI_PINS_6:
		return "SSI6";
		default:
		return "UNKNOWN";
		}
		}

		static ssize_t audmux_read_file(struct file file, char __user user_buf,
		size_t count, loff_t *ppos)
		{
		ssize_t ret;
		char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
		int port = (int)file->private_data;
		u32 pdcr, ptcr;

		if (!buf)
		return -ENOMEM;

		if (audmux_clk)
		clk_enable(audmux_clk);

		ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
		pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));

		if (audmux_clk)
		clk_disable(audmux_clk);

		ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
		pdcr, ptcr);

		if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR)
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"TxFS output from %s, ",
		audmux_port_string((ptcr >> 27) & 0x7));
		else
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"TxFS input, ");

		if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR)
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"TxClk output from %s",
		audmux_port_string((ptcr >> 22) & 0x7));
		else
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"TxClk input");

		ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");

		if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) {
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"Port is symmetric");
		} else {
		if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR)
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"RxFS output from %s, ",
		audmux_port_string((ptcr >> 17) & 0x7));
		else
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"RxFS input, ");

		if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR)
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"RxClk output from %s",
		audmux_port_string((ptcr >> 12) & 0x7));
		else
		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"RxClk input");
		}

		ret += snprintf(buf + ret, PAGE_SIZE - ret,
		"\nData received from %s\n",
		audmux_port_string((pdcr >> 13) & 0x7));

		ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);

		kfree(buf);

		return ret;
		}

		static const struct file_operations audmux_debugfs_fops = {
		.open = audmux_open_file,
		.read = audmux_read_file,
		};

		static void audmux_debugfs_init(void)
		{
		int i;
		char buf[20];

		audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
		if (!audmux_debugfs_root) {
		pr_warning("Failed to create AUDMUX debugfs root\n");
		return;
		}

		for (i = 1; i < 8; i++) {
		snprintf(buf, sizeof(buf), "ssi%d", i);
		if (!debugfs_create_file(buf, 0444, audmux_debugfs_root,
		(void *)i, &audmux_debugfs_fops))
		pr_warning("Failed to create AUDMUX port %d debugfs file\n",
		i);
		}
		}
		#else
		static inline void audmux_debugfs_init(void)
		{
		}
		#endif

		int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
		unsigned int pdcr)
		{
		@@ -68,6 +203,8 @@ static int mxc_audmux_v2_init(void)
		if (cpu_is_mx31() \|\| cpu_is_mx35())
		audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);

		audmux_debugfs_init();

		return 0;
		}

arch/arm/plat-mxc/include/mach/board-mx31lite.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -25,7 +25,7 @@

		#ifndef __ASSEMBLY__

		enum mx31lilly_boards {
		enum mx31lite_boards {
		MX31LITE_NOBOARD = 0,
		MX31LITE_DB = 1,
		};