Loading Documentation/devicetree/bindings/pci/msm_pcie.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -72,6 +72,7 @@ Optional Properties: endpoint. endpoint. - qcom,n-fts: The number of fast training sequences sent when the link state - qcom,n-fts: The number of fast training sequences sent when the link state is changed from L0s to L0. is changed from L0s to L0. - qcom,pcie-phy-ver: version of PCIe PHY. - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the root complex has the capability to enumerate the endpoint for this case. root complex has the capability to enumerate the endpoint for this case. - qcom,msi-gicm-addr: MSI address for GICv2m. - qcom,msi-gicm-addr: MSI address for GICv2m. Loading Loading @@ -217,6 +218,7 @@ Example: qcom,l1ss-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,aux-clk-sync; qcom,n-fts = <0x50>; qcom,n-fts = <0x50>; qcom,pcie-phy-ver = <1>; qcom,ep-wakeirq; qcom,ep-wakeirq; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-base = <0x160>; qcom,msi-gicm-base = <0x160>; Loading arch/arm/boot/dts/qcom/msm8996-v3.dtsi +12 −0 Original line number Original line Diff line number Diff line Loading @@ -66,6 +66,18 @@ <&clock_gpu clk_gfx3d_clk_src_v2>; <&clock_gpu clk_gfx3d_clk_src_v2>; }; }; &pcie0 { qcom,pcie-phy-ver = <3>; }; &pcie1 { qcom,pcie-phy-ver = <3>; }; &pcie2 { qcom,pcie-phy-ver = <3>; }; /* GPU overrides */ /* GPU overrides */ &msm_gpu { &msm_gpu { /* Updated chip ID */ /* Updated chip ID */ Loading drivers/pci/host/pci-msm.c +149 −102 File changed.Preview size limit exceeded, changes collapsed. Show changes Loading
Documentation/devicetree/bindings/pci/msm_pcie.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -72,6 +72,7 @@ Optional Properties: endpoint. endpoint. - qcom,n-fts: The number of fast training sequences sent when the link state - qcom,n-fts: The number of fast training sequences sent when the link state is changed from L0s to L0. is changed from L0s to L0. - qcom,pcie-phy-ver: version of PCIe PHY. - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the root complex has the capability to enumerate the endpoint for this case. root complex has the capability to enumerate the endpoint for this case. - qcom,msi-gicm-addr: MSI address for GICv2m. - qcom,msi-gicm-addr: MSI address for GICv2m. Loading Loading @@ -217,6 +218,7 @@ Example: qcom,l1ss-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,aux-clk-sync; qcom,n-fts = <0x50>; qcom,n-fts = <0x50>; qcom,pcie-phy-ver = <1>; qcom,ep-wakeirq; qcom,ep-wakeirq; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-base = <0x160>; qcom,msi-gicm-base = <0x160>; Loading
arch/arm/boot/dts/qcom/msm8996-v3.dtsi +12 −0 Original line number Original line Diff line number Diff line Loading @@ -66,6 +66,18 @@ <&clock_gpu clk_gfx3d_clk_src_v2>; <&clock_gpu clk_gfx3d_clk_src_v2>; }; }; &pcie0 { qcom,pcie-phy-ver = <3>; }; &pcie1 { qcom,pcie-phy-ver = <3>; }; &pcie2 { qcom,pcie-phy-ver = <3>; }; /* GPU overrides */ /* GPU overrides */ &msm_gpu { &msm_gpu { /* Updated chip ID */ /* Updated chip ID */ Loading
drivers/pci/host/pci-msm.c +149 −102 File changed.Preview size limit exceeded, changes collapsed. Show changes