Loading Documentation/devicetree/bindings/arm/gic.txt 0 → 100644 +55 −0 Original line number Diff line number Diff line * ARM Generic Interrupt Controller ARM SMP cores are often associated with a GIC, providing per processor interrupts (PPI), shared processor interrupts (SPI) and software generated interrupts (SGI). Primary GIC is attached directly to the CPU and typically has PPIs and SGIs. Secondary GICs are cascaded into the upward interrupt controller and do not have PPIs or SGIs. Main node required properties: - compatible : should be one of: "arm,cortex-a9-gic" "arm,arm11mp-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a <u32> and the value shall be 3. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI interrupts. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of the 8 possible cpus attached to the GIC. A bit set to '1' indicated the interrupt is wired to that CPU. Only valid for PPI interrupts. - reg : Specifies base physical address(s) and size of the GIC registers. The first region is the GIC distributor register base and size. The 2nd region is the GIC cpu interface register base and size. Optional - interrupts : Interrupt source of the parent interrupt controller. Only present on secondary GICs. Example: intc: interrupt-controller@fff11000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; reg = <0xfff11000 0x1000>, <0xfff10100 0x100>; }; arch/arm/Kconfig +94 −10 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ config ARM select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ select GENERIC_IRQ_SHOW select CPU_PM if (SUSPEND || CPU_IDLE) help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and Loading Loading @@ -195,7 +196,8 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT bool "Patch physical to virtual translations at runtime" bool "Patch physical to virtual translations at runtime" if EMBEDDED default y depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help Loading @@ -204,16 +206,25 @@ config ARM_PATCH_PHYS_VIRT kernel in system memory. This can only be used with non-XIP MMU kernels where the base of physical memory is at a 16MB boundary, or theoretically 64K for the MSM machine class. of physical memory is at a 16MB boundary. config ARM_PATCH_PHYS_VIRT_16BIT def_bool y depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM Only disable this option if you know that you do not require this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. config NEED_MACH_MEMORY_H bool help This option extends the physical to virtual translation patching to allow physical memory down to a theoretical minimum of 64K boundaries. Select this when mach/memory.h is required to provide special definitions for this platform. The need for mach/memory.h should be avoided when possible. config PHYS_OFFSET hex "Physical address of main memory" depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H help Please provide the physical address corresponding to the location of main memory in your system. source "init/Kconfig" Loading Loading @@ -246,6 +257,7 @@ config ARCH_INTEGRATOR select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ select NEED_MACH_MEMORY_H help Support for ARM's Integrator platform. Loading @@ -261,6 +273,7 @@ config ARCH_REALVIEW select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB select NEED_MACH_MEMORY_H help This enables support for ARM Ltd RealView boards. Loading Loading @@ -301,7 +314,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select HAVE_CLK select CLKDEV_LOOKUP select ARM_PATCH_PHYS_VIRT if MMU help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. Loading @@ -322,6 +334,7 @@ config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x based boards. Loading Loading @@ -362,6 +375,7 @@ config ARCH_EBSA110 select ISA select NO_IOPORT select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an Loading @@ -377,6 +391,7 @@ config ARCH_EP93XX select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_USES_GETTIMEOFFSET select NEED_MEMORY_H help This enables support for the Cirrus EP93xx series of CPUs. Loading @@ -385,6 +400,7 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS select NEED_MACH_MEMORY_H help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. Loading Loading @@ -434,6 +450,7 @@ config ARCH_IOP13XX select PCI select ARCH_SUPPORTS_MSI select VMSPLIT_1G select NEED_MACH_MEMORY_H help Support for Intel's IOP13XX (XScale) family of processors. Loading Loading @@ -464,6 +481,7 @@ config ARCH_IXP23XX select CPU_XSC3 select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Intel's IXP23xx (XScale) family of processors. Loading @@ -473,6 +491,7 @@ config ARCH_IXP2000 select CPU_XSCALE select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Intel's IXP2400/2800 (XScale) family of processors. Loading Loading @@ -566,6 +585,7 @@ config ARCH_KS8695 select CPU_ARM922T select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based System-on-Chip devices. Loading Loading @@ -657,6 +677,7 @@ config ARCH_SHMOBILE select SPARSE_IRQ select MULTI_IRQ_HANDLER select PM_GENERIC_DOMAINS if PM select NEED_MACH_MEMORY_H help Support for Renesas's SH-Mobile and R-Mobile ARM platforms. Loading @@ -671,6 +692,7 @@ config ARCH_RPC select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. Loading @@ -689,6 +711,7 @@ config ARCH_SA1100 select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select NEED_MACH_MEMORY_H help Support for StrongARM 11x0 based boards. Loading Loading @@ -781,6 +804,7 @@ config ARCH_S5PV210 select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG select NEED_MACH_MEMORY_H help Samsung S5PV210/S5PC110 series based systems Loading @@ -797,6 +821,7 @@ config ARCH_EXYNOS4 select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG select NEED_MACH_MEMORY_H help Samsung EXYNOS4 series based systems Loading @@ -808,6 +833,7 @@ config ARCH_SHARK select ZONE_DMA select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (<http://www.shark-linux.de/shark.html>). Loading Loading @@ -836,6 +862,7 @@ config ARCH_U300 select HAVE_MACH_CLKDEV select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB select NEED_MACH_MEMORY_H help Support for ST-Ericsson U300 series mobile platforms. Loading Loading @@ -1408,6 +1435,31 @@ config SMP_ON_UP If you don't know what to do here, say Y. config ARM_CPU_TOPOLOGY bool "Support cpu topology definition" depends on SMP && CPU_V7 default y help Support ARM cpu topology definition. The MPIDR register defines affinity between processors which is then used to describe the cpu topology of an ARM System. config SCHED_MC bool "Multi-core scheduler support" depends on ARM_CPU_TOPOLOGY help Multi-core scheduler support improves the CPU scheduler's decision making when dealing with multi-core CPU chips at a cost of slightly increased overhead in some places. If unsure say N here. config SCHED_SMT bool "SMT scheduler support" depends on ARM_CPU_TOPOLOGY help Improves the CPU scheduler's decision making when dealing with MultiThreading at a cost of slightly increased overhead in some places. If unsure say N here. config HAVE_ARM_SCU bool help Loading Loading @@ -1808,6 +1860,38 @@ config ZBOOT_ROM_SH_MOBILE_SDHI endchoice config ARM_APPENDED_DTB bool "Use appended device tree blob to zImage (EXPERIMENTAL)" depends on OF && !ZBOOT_ROM && EXPERIMENTAL help With this option, the boot code will look for a device tree binary (DTB) appended to zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb). This is meant as a backward compatibility convenience for those systems with a bootloader that can't be upgraded to accommodate the documented boot protocol using a device tree. Beware that there is very little in terms of protection against this option being confused by leftover garbage in memory that might look like a DTB header after a reboot if no actual DTB is appended to zImage. Do not leave this option active in a production kernel if you don't intend to always append a DTB. Proper passing of the location into r2 of a bootloader provided DTB is always preferable to this option. config ARM_ATAG_DTB_COMPAT bool "Supplement the appended DTB with traditional ATAG information" depends on ARM_APPENDED_DTB help Some old bootloaders can't be updated to a DTB capable one, yet they provide ATAGs with memory configuration, the ramdisk address, the kernel cmdline string, etc. Such information is dynamically provided by the bootloader and can't always be stored in a static DTB. To allow a device tree enabled kernel to be used with such bootloaders, this option allows zImage to extract the information from the ATAG list and store it at run time into the appended DTB. config CMDLINE string "Default kernel command string" default "" Loading arch/arm/Kconfig.debug +6 −0 Original line number Diff line number Diff line Loading @@ -158,4 +158,10 @@ config DEBUG_S3C_UART The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. config ARM_KPROBES_TEST tristate "Kprobes test module" depends on KPROBES && MODULES help Perform tests of kprobes API and instruction set simulation. endmenu arch/arm/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. Loading arch/arm/boot/compressed/.gitignore +9 −0 Original line number Diff line number Diff line Loading @@ -5,3 +5,12 @@ piggy.lzo piggy.lzma vmlinux vmlinux.lds # borrowed libfdt files fdt.c fdt.h fdt_ro.c fdt_rw.c fdt_wip.c libfdt.h libfdt_internal.h Loading
Documentation/devicetree/bindings/arm/gic.txt 0 → 100644 +55 −0 Original line number Diff line number Diff line * ARM Generic Interrupt Controller ARM SMP cores are often associated with a GIC, providing per processor interrupts (PPI), shared processor interrupts (SPI) and software generated interrupts (SGI). Primary GIC is attached directly to the CPU and typically has PPIs and SGIs. Secondary GICs are cascaded into the upward interrupt controller and do not have PPIs or SGIs. Main node required properties: - compatible : should be one of: "arm,cortex-a9-gic" "arm,arm11mp-gic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The type shall be a <u32> and the value shall be 3. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI interrupts. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 = low-to-high edge triggered 2 = high-to-low edge triggered 4 = active high level-sensitive 8 = active low level-sensitive bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of the 8 possible cpus attached to the GIC. A bit set to '1' indicated the interrupt is wired to that CPU. Only valid for PPI interrupts. - reg : Specifies base physical address(s) and size of the GIC registers. The first region is the GIC distributor register base and size. The 2nd region is the GIC cpu interface register base and size. Optional - interrupts : Interrupt source of the parent interrupt controller. Only present on secondary GICs. Example: intc: interrupt-controller@fff11000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; reg = <0xfff11000 0x1000>, <0xfff10100 0x100>; };
arch/arm/Kconfig +94 −10 Original line number Diff line number Diff line Loading @@ -29,6 +29,7 @@ config ARM select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ select GENERIC_IRQ_SHOW select CPU_PM if (SUSPEND || CPU_IDLE) help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and Loading Loading @@ -195,7 +196,8 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT bool "Patch physical to virtual translations at runtime" bool "Patch physical to virtual translations at runtime" if EMBEDDED default y depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help Loading @@ -204,16 +206,25 @@ config ARM_PATCH_PHYS_VIRT kernel in system memory. This can only be used with non-XIP MMU kernels where the base of physical memory is at a 16MB boundary, or theoretically 64K for the MSM machine class. of physical memory is at a 16MB boundary. config ARM_PATCH_PHYS_VIRT_16BIT def_bool y depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM Only disable this option if you know that you do not require this feature (eg, building a kernel for a single machine) and you need to shrink the kernel to the minimal size. config NEED_MACH_MEMORY_H bool help This option extends the physical to virtual translation patching to allow physical memory down to a theoretical minimum of 64K boundaries. Select this when mach/memory.h is required to provide special definitions for this platform. The need for mach/memory.h should be avoided when possible. config PHYS_OFFSET hex "Physical address of main memory" depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H help Please provide the physical address corresponding to the location of main memory in your system. source "init/Kconfig" Loading Loading @@ -246,6 +257,7 @@ config ARCH_INTEGRATOR select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ select NEED_MACH_MEMORY_H help Support for ARM's Integrator platform. Loading @@ -261,6 +273,7 @@ config ARCH_REALVIEW select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB select NEED_MACH_MEMORY_H help This enables support for ARM Ltd RealView boards. Loading Loading @@ -301,7 +314,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select HAVE_CLK select CLKDEV_LOOKUP select ARM_PATCH_PHYS_VIRT if MMU help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. Loading @@ -322,6 +334,7 @@ config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x based boards. Loading Loading @@ -362,6 +375,7 @@ config ARCH_EBSA110 select ISA select NO_IOPORT select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an Loading @@ -377,6 +391,7 @@ config ARCH_EP93XX select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_USES_GETTIMEOFFSET select NEED_MEMORY_H help This enables support for the Cirrus EP93xx series of CPUs. Loading @@ -385,6 +400,7 @@ config ARCH_FOOTBRIDGE select CPU_SA110 select FOOTBRIDGE select GENERIC_CLOCKEVENTS select NEED_MACH_MEMORY_H help Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. Loading Loading @@ -434,6 +450,7 @@ config ARCH_IOP13XX select PCI select ARCH_SUPPORTS_MSI select VMSPLIT_1G select NEED_MACH_MEMORY_H help Support for Intel's IOP13XX (XScale) family of processors. Loading Loading @@ -464,6 +481,7 @@ config ARCH_IXP23XX select CPU_XSC3 select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Intel's IXP23xx (XScale) family of processors. Loading @@ -473,6 +491,7 @@ config ARCH_IXP2000 select CPU_XSCALE select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Intel's IXP2400/2800 (XScale) family of processors. Loading Loading @@ -566,6 +585,7 @@ config ARCH_KS8695 select CPU_ARM922T select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based System-on-Chip devices. Loading Loading @@ -657,6 +677,7 @@ config ARCH_SHMOBILE select SPARSE_IRQ select MULTI_IRQ_HANDLER select PM_GENERIC_DOMAINS if PM select NEED_MACH_MEMORY_H help Support for Renesas's SH-Mobile and R-Mobile ARM platforms. Loading @@ -671,6 +692,7 @@ config ARCH_RPC select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. Loading @@ -689,6 +711,7 @@ config ARCH_SA1100 select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select NEED_MACH_MEMORY_H help Support for StrongARM 11x0 based boards. Loading Loading @@ -781,6 +804,7 @@ config ARCH_S5PV210 select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG select NEED_MACH_MEMORY_H help Samsung S5PV210/S5PC110 series based systems Loading @@ -797,6 +821,7 @@ config ARCH_EXYNOS4 select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG select NEED_MACH_MEMORY_H help Samsung EXYNOS4 series based systems Loading @@ -808,6 +833,7 @@ config ARCH_SHARK select ZONE_DMA select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (<http://www.shark-linux.de/shark.html>). Loading Loading @@ -836,6 +862,7 @@ config ARCH_U300 select HAVE_MACH_CLKDEV select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB select NEED_MACH_MEMORY_H help Support for ST-Ericsson U300 series mobile platforms. Loading Loading @@ -1408,6 +1435,31 @@ config SMP_ON_UP If you don't know what to do here, say Y. config ARM_CPU_TOPOLOGY bool "Support cpu topology definition" depends on SMP && CPU_V7 default y help Support ARM cpu topology definition. The MPIDR register defines affinity between processors which is then used to describe the cpu topology of an ARM System. config SCHED_MC bool "Multi-core scheduler support" depends on ARM_CPU_TOPOLOGY help Multi-core scheduler support improves the CPU scheduler's decision making when dealing with multi-core CPU chips at a cost of slightly increased overhead in some places. If unsure say N here. config SCHED_SMT bool "SMT scheduler support" depends on ARM_CPU_TOPOLOGY help Improves the CPU scheduler's decision making when dealing with MultiThreading at a cost of slightly increased overhead in some places. If unsure say N here. config HAVE_ARM_SCU bool help Loading Loading @@ -1808,6 +1860,38 @@ config ZBOOT_ROM_SH_MOBILE_SDHI endchoice config ARM_APPENDED_DTB bool "Use appended device tree blob to zImage (EXPERIMENTAL)" depends on OF && !ZBOOT_ROM && EXPERIMENTAL help With this option, the boot code will look for a device tree binary (DTB) appended to zImage (e.g. cat zImage <filename>.dtb > zImage_w_dtb). This is meant as a backward compatibility convenience for those systems with a bootloader that can't be upgraded to accommodate the documented boot protocol using a device tree. Beware that there is very little in terms of protection against this option being confused by leftover garbage in memory that might look like a DTB header after a reboot if no actual DTB is appended to zImage. Do not leave this option active in a production kernel if you don't intend to always append a DTB. Proper passing of the location into r2 of a bootloader provided DTB is always preferable to this option. config ARM_ATAG_DTB_COMPAT bool "Supplement the appended DTB with traditional ATAG information" depends on ARM_APPENDED_DTB help Some old bootloaders can't be updated to a DTB capable one, yet they provide ATAGs with memory configuration, the ramdisk address, the kernel cmdline string, etc. Such information is dynamically provided by the bootloader and can't always be stored in a static DTB. To allow a device tree enabled kernel to be used with such bootloaders, this option allows zImage to extract the information from the ATAG list and store it at run time into the appended DTB. config CMDLINE string "Default kernel command string" default "" Loading
arch/arm/Kconfig.debug +6 −0 Original line number Diff line number Diff line Loading @@ -158,4 +158,10 @@ config DEBUG_S3C_UART The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. config ARM_KPROBES_TEST tristate "Kprobes test module" depends on KPROBES && MODULES help Perform tests of kprobes API and instruction set simulation. endmenu
arch/arm/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. Loading
arch/arm/boot/compressed/.gitignore +9 −0 Original line number Diff line number Diff line Loading @@ -5,3 +5,12 @@ piggy.lzo piggy.lzma vmlinux vmlinux.lds # borrowed libfdt files fdt.c fdt.h fdt_ro.c fdt_rw.c fdt_wip.c libfdt.h libfdt_internal.h