Loading arch/arm/Kconfig +0 −4 Original line number Diff line number Diff line Loading @@ -67,10 +67,6 @@ config GENERIC_BUST_SPINLOCK config GENERIC_ISA_DMA bool config GENERIC_IOMAP bool default y config FIQ bool Loading arch/arm/mm/ioremap.c +47 −0 Original line number Diff line number Diff line Loading @@ -170,3 +170,50 @@ void __iounmap(void __iomem *addr) vfree((void *) (PAGE_MASK & (unsigned long) addr)); } EXPORT_SYMBOL(__iounmap); #ifdef __io void __iomem *ioport_map(unsigned long port, unsigned int nr) { return __io(port); } EXPORT_SYMBOL(ioport_map); void ioport_unmap(void __iomem *addr) { } EXPORT_SYMBOL(ioport_unmap); #endif #ifdef CONFIG_PCI #include <linux/pci.h> #include <linux/ioport.h> void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) { unsigned long start = pci_resource_start(dev, bar); unsigned long len = pci_resource_len(dev, bar); unsigned long flags = pci_resource_flags(dev, bar); if (!len || !start) return NULL; if (maxlen && len > maxlen) len = maxlen; if (flags & IORESOURCE_IO) return ioport_map(start, len); if (flags & IORESOURCE_MEM) { if (flags & IORESOURCE_CACHEABLE) return ioremap(start, len); return ioremap_nocache(start, len); } return NULL; } EXPORT_SYMBOL(pci_iomap); void pci_iounmap(struct pci_dev *dev, void __iomem *addr) { if ((unsigned long)addr >= VMALLOC_START && (unsigned long)addr < VMALLOC_END) iounmap(addr); } EXPORT_SYMBOL(pci_iounmap); #endif include/asm-arm/io.h +27 −0 Original line number Diff line number Diff line Loading @@ -272,6 +272,33 @@ extern void __iounmap(void __iomem *addr); #define iounmap(cookie) __arch_iounmap(cookie) #endif /* * io{read,write}{8,16,32} macros */ #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) #define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; }) #define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; }) #define iowrite8(v,p) __raw_writeb(v, p) #define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p) #define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p) #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) #define ioread32_rep(p,d,c) __raw_readsl(p,d,c) #define iowrite8_rep(p,s,c) __raw_writesb(p,s,c) #define iowrite16_rep(p,s,c) __raw_writesw(p,s,c) #define iowrite32_rep(p,s,c) __raw_writesl(p,s,c) extern void __iomem *ioport_map(unsigned long port, unsigned int nr); extern void ioport_unmap(void __iomem *addr); struct pci_dev; extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); /* * can the hardware map this into one segment or not, given no other * constraints. Loading Loading
arch/arm/Kconfig +0 −4 Original line number Diff line number Diff line Loading @@ -67,10 +67,6 @@ config GENERIC_BUST_SPINLOCK config GENERIC_ISA_DMA bool config GENERIC_IOMAP bool default y config FIQ bool Loading
arch/arm/mm/ioremap.c +47 −0 Original line number Diff line number Diff line Loading @@ -170,3 +170,50 @@ void __iounmap(void __iomem *addr) vfree((void *) (PAGE_MASK & (unsigned long) addr)); } EXPORT_SYMBOL(__iounmap); #ifdef __io void __iomem *ioport_map(unsigned long port, unsigned int nr) { return __io(port); } EXPORT_SYMBOL(ioport_map); void ioport_unmap(void __iomem *addr) { } EXPORT_SYMBOL(ioport_unmap); #endif #ifdef CONFIG_PCI #include <linux/pci.h> #include <linux/ioport.h> void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) { unsigned long start = pci_resource_start(dev, bar); unsigned long len = pci_resource_len(dev, bar); unsigned long flags = pci_resource_flags(dev, bar); if (!len || !start) return NULL; if (maxlen && len > maxlen) len = maxlen; if (flags & IORESOURCE_IO) return ioport_map(start, len); if (flags & IORESOURCE_MEM) { if (flags & IORESOURCE_CACHEABLE) return ioremap(start, len); return ioremap_nocache(start, len); } return NULL; } EXPORT_SYMBOL(pci_iomap); void pci_iounmap(struct pci_dev *dev, void __iomem *addr) { if ((unsigned long)addr >= VMALLOC_START && (unsigned long)addr < VMALLOC_END) iounmap(addr); } EXPORT_SYMBOL(pci_iounmap); #endif
include/asm-arm/io.h +27 −0 Original line number Diff line number Diff line Loading @@ -272,6 +272,33 @@ extern void __iounmap(void __iomem *addr); #define iounmap(cookie) __arch_iounmap(cookie) #endif /* * io{read,write}{8,16,32} macros */ #define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) #define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; }) #define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; }) #define iowrite8(v,p) __raw_writeb(v, p) #define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p) #define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p) #define ioread8_rep(p,d,c) __raw_readsb(p,d,c) #define ioread16_rep(p,d,c) __raw_readsw(p,d,c) #define ioread32_rep(p,d,c) __raw_readsl(p,d,c) #define iowrite8_rep(p,s,c) __raw_writesb(p,s,c) #define iowrite16_rep(p,s,c) __raw_writesw(p,s,c) #define iowrite32_rep(p,s,c) __raw_writesl(p,s,c) extern void __iomem *ioport_map(unsigned long port, unsigned int nr); extern void ioport_unmap(void __iomem *addr); struct pci_dev; extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); /* * can the hardware map this into one segment or not, given no other * constraints. Loading