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Commit 09626aef authored by Srinu Gorle's avatar Srinu Gorle
Browse files

ARM: dts: msm: Add venus device nodes for msmtitanium 



Add venus device nodes to support hardware accelerated
video codecs for msmtitanium.

Change-Id: I16ec08edcc755faad9576d96754b80876cfa56c7
Signed-off-by: default avatarSrinu Gorle <sgorle@codeaurora.org>
parent c2e38a43

arch/arm/boot/dts/qcom/msmtitanium-iommu-domains.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -21,5 +21,46 @@ 
			qcom,iommu-contexts = <&adsp_shared>;

			qcom,virtual-addr-pool = <0x80000000 0x7FFFFFFF>;

		};



		/*

		 * non-secure addr pool from 1500 MB to 3532 MB

		 *                           3532 MB to 3548 MB

		 */

		venus_domain_ns: qcom,iommu-domain2 {

			label = "venus_ns";

			qcom,iommu-contexts = <&venus_ns>;

			qcom,virtual-addr-pool = <0x5dc00000 0x7f000000

						0xdcc00000 0x1000000>;

		};



		/*

		 * secure bitstream addr pool from 1200 MB to 1500 MB

		 */

		venus_domain_sec_bitstream: qcom,iommu-domain3 {

			label = "venus_sec_bitstream";

			qcom,iommu-contexts = <&venus_sec_bitstream>;

			qcom,virtual-addr-pool = <0x4b000000 0x12c00000>;

			qcom,secure-domain;

		};



		/*

		 * secure pixel addr pool from 616 MB to 1200 MB

		 */

		venus_domain_sec_pixel: qcom,iommu-domain4 {

			label = "venus_sec_pixel";

			qcom,iommu-contexts = <&venus_sec_pixel>;

			qcom,virtual-addr-pool = <0x25800000 0x25800000>;

			qcom,secure-domain;

		};



		/*

		 * secure non-pixel addr pool from 16 MB to 616 MB

		 */

		venus_domain_sec_non_pixel: qcom,iommu-domain5 {

			label = "venus_sec_non_pixel";

			qcom,iommu-contexts = <&venus_sec_non_pixel>;

			qcom,virtual-addr-pool = <0x1000000 0x24800000>;

			qcom,secure-domain;

		};

	};

};

arch/arm/boot/dts/qcom/msmtitanium-vidc.dtsi

0 → 100644
+105 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	qcom,vidc@1d00000 {

		compatible = "qcom,msm-vidc";

		reg = <0x01d00000 0xff000>;

		interrupts = <0 44 0>;

		/* Regulators */

		venus-supply = <&gdsc_venus>;

		venus-core0-supply = <&gdsc_venus_core0>;

		/* Clocks */

		clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>,

			<&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>,

			<&clock_gcc clk_gcc_venus0_ahb_clk>,

			<&clock_gcc clk_gcc_venus0_axi_clk>;

		clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk";

		qcom,clock-configs = <0x1 0x0 0x0 0x0 0x0>;

		qcom,load-freq-tbl =

			/* Decoders */

			<979200 400000000 0xffffffff>,	/* UHD @ 30 */

			<734400 400000000 0xffffffff>,	/* 1080p @ 90 */

			<489600 400000000 0xffffffff>,	/* 1080p @ 60 */

			<432000 400000000 0xffffffff>,	/* 720p @ 120 */

			<244800 400000000 0xffffffff>,	/* 1080p @ 30 */

			<216000 400000000 0xffffffff>,	/* 720p @ 60 */

			<108000 400000000 0xffffffff>,	/* 720p @ 30 */

			<36000 400000000 0xffffffff>,	/* 480p @ 30 */



			/* Encoders */

			<979200 400000000 0x55555555>,	/* UHD @ 30 */

			<734400 400000000 0x55555555>,	/* 1080p @ 90 */

			<489600 400000000 0x55555555>,	/* 1080p @ 60 */

			<432000 400000000 0x55555555>,	/* 720p @ 120 */

			<244800 400000000 0x55555555>,	/* 1080p @ 30 */

			<216000 400000000 0x55555555>,	/* 720p @ 60 */

			<108000 400000000 0x55555555>,	/* 720p @ 30 */

			<36000 400000000 0x55555555>;	/* 480p @ 30 */

		qcom,hfi = "venus";

		qcom,hfi-version = "3xx";

		qcom,reg-presets = <0xe0020 0x05555556>,

			<0xe0024 0x05555556>,

			<0x80124 0x00000003>;

		qcom,qdss-presets = <0x825000 0x1000>,

			<0x826000 0x1000>,

			<0x821000 0x1000>,

			<0x802000 0x1000>,

			<0x9180000 0x1000>,

			<0x9181000 0x1000>;

		qcom,max-hw-load = <979200>; /* 3840 x 2176 @ 30 fps */

		qcom,firmware-name = "venus";

		qcom,vidc-iommu-domains {

			qcom,domain-ns {

				qcom,vidc-domain-phandle = <&venus_domain_ns>;

				qcom,vidc-buffer-types = <0xfff>;

			};



			qcom,domain-sec-bs {

				qcom,vidc-domain-phandle =

					<&venus_domain_sec_bitstream>;

				qcom,vidc-buffer-types = <0x241>;

			};



			qcom,domain-sec-px {

				qcom,vidc-domain-phandle =

					<&venus_domain_sec_pixel>;

				qcom,vidc-buffer-types = <0x106>;

			};



			qcom,domain-sec-np {

				qcom,vidc-domain-phandle =

					<&venus_domain_sec_non_pixel>;

				qcom,vidc-buffer-types = <0x480>;

			};

		};



		/* Buses */

		venus_bus_ddr {

			compatible = "qcom,msm-vidc,bus";

			label = "venus-ddr";

			qcom,bus-master = <63>;

			qcom,bus-slave = <512>;

			qcom,bus-governor = "msm-vidc-ddr";

			qcom,bus-range-kbps = <1000 1205248>;

		};



		arm9_bus_ddr {

			compatible = "qcom,msm-vidc,bus";

			label = "venus-arm9-ddr";

			qcom,bus-master = <63>;

			qcom,bus-slave = <512>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1 1>;

		};

	};

};

arch/arm/boot/dts/qcom/msmtitanium.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -100,6 +100,7 @@ 
#include "msm-arm-smmu-titanium.dtsi"

#include "msmtitanium-coresight.dtsi"

#include "msmtitanium-iommu-domains.dtsi"

#include "msmtitanium-vidc.dtsi"



&soc {

	#address-cells = <1>;