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Commit 0949be35 authored by Simon Arlott's avatar Simon Arlott Committed by Andi Kleen
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[PATCH] i386: Add an option for the VIA C7 which sets appropriate L1 cache 

The VIA C7 is a 686 (with TSC) that supports MMX, SSE and SSE2, it also has
a cache line length of 64 according to
http://www.digit-life.com/articles2/cpu/rmma-via-c7.html

.  This patch sets
gcc to -march=686 and select s the correct cache shift.

Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Dave Jones <davej@codemonkey.org.uk>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent f5e88615

arch/i386/Kconfig.cpu

+10 −3
Original line number Original line Diff line number Diff line
@@ -43,6 +43,7 @@ config M386 
	  - "Geode GX/LX" For AMD Geode GX and LX processors.

	  - "Geode GX/LX" For AMD Geode GX and LX processors.

	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.

	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.

	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).

	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).

	  - "VIA C7" for VIA C7.





	  If you don't know what to do, choose "386".

	  If you don't know what to do, choose "386".
@@ -203,6 +204,12 @@ config MVIAC3_2 
	  of SSE and tells gcc to treat the CPU as a 686.

	  of SSE and tells gcc to treat the CPU as a 686.

	  Note, this kernel will not boot on older (pre model 9) C3s.

	  Note, this kernel will not boot on older (pre model 9) C3s.





config MVIAC7

	bool "VIA C7"

	help

	  Select this for a VIA C7.  Selecting this uses the correct cache

	  shift and tells gcc to treat the CPU as a 686.



endchoice

endchoice





config X86_GENERIC

config X86_GENERIC
@@ -231,7 +238,7 @@ config X86_L1_CACHE_SHIFT 
	default "7" if MPENTIUM4 || X86_GENERIC

	default "7" if MPENTIUM4 || X86_GENERIC

	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1

	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1

	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2

	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7





config RWSEM_GENERIC_SPINLOCK

config RWSEM_GENERIC_SPINLOCK

	bool

	bool
@@ -297,7 +304,7 @@ config X86_ALIGNMENT_16 




config X86_GOOD_APIC

config X86_GOOD_APIC

	bool

	bool

	depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2

	depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7

	default y

	default y





config X86_INTEL_USERCOPY

config X86_INTEL_USERCOPY
@@ -322,5 +329,5 @@ config X86_OOSTORE 




config X86_TSC

config X86_TSC

	bool

	bool

	depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ

	depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ

	default y
 
	default y

arch/i386/Makefile.cpu

+1 −0
Original line number Original line Diff line number Diff line
@@ -32,6 +32,7 @@ cflags-$(CONFIG_MWINCHIP2) += $(call cc-option,-march=winchip2,-march=i586) 
cflags-$(CONFIG_MWINCHIP3D)	+= $(call cc-option,-march=winchip2,-march=i586)

cflags-$(CONFIG_MWINCHIP3D)	+= $(call cc-option,-march=winchip2,-march=i586)

cflags-$(CONFIG_MCYRIXIII)	+= $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0

cflags-$(CONFIG_MCYRIXIII)	+= $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0

cflags-$(CONFIG_MVIAC3_2)	+= $(call cc-option,-march=c3-2,-march=i686)

cflags-$(CONFIG_MVIAC3_2)	+= $(call cc-option,-march=c3-2,-march=i686)

cflags-$(CONFIG_MVIAC7)		+= -march=i686

cflags-$(CONFIG_MCORE2)		+= -march=i686 $(call cc-option,-mtune=core2,$(call cc-option,-mtune=generic,-mtune=i686))

cflags-$(CONFIG_MCORE2)		+= -march=i686 $(call cc-option,-mtune=core2,$(call cc-option,-mtune=generic,-mtune=i686))





# AMD Elan support

# AMD Elan support

arch/um/defconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -41,6 +41,7 @@ CONFIG_M686=y 
# CONFIG_MGEODE_LX is not set

# CONFIG_MGEODE_LX is not set

# CONFIG_MCYRIXIII is not set

# CONFIG_MCYRIXIII is not set

# CONFIG_MVIAC3_2 is not set

# CONFIG_MVIAC3_2 is not set

# CONFIG_MVIAC7 is not set

# CONFIG_X86_GENERIC is not set

# CONFIG_X86_GENERIC is not set

CONFIG_X86_CMPXCHG=y

CONFIG_X86_CMPXCHG=y

CONFIG_X86_XADD=y

CONFIG_X86_XADD=y

include/asm-i386/module.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -54,6 +54,8 @@ struct mod_arch_specific 
#define MODULE_PROC_FAMILY "CYRIXIII "

#define MODULE_PROC_FAMILY "CYRIXIII "

#elif defined CONFIG_MVIAC3_2

#elif defined CONFIG_MVIAC3_2

#define MODULE_PROC_FAMILY "VIAC3-2 "

#define MODULE_PROC_FAMILY "VIAC3-2 "

#elif defined CONFIG_MVIAC7

#define MODULE_PROC_FAMILY "VIAC7 "

#elif defined CONFIG_MGEODEGX1

#elif defined CONFIG_MGEODEGX1

#define MODULE_PROC_FAMILY "GEODEGX1 "

#define MODULE_PROC_FAMILY "GEODEGX1 "

#elif defined CONFIG_MGEODE_LX

#elif defined CONFIG_MGEODE_LX