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Commit 08638d45 authored by Hemant Kumar's avatar Hemant Kumar Committed by Mayank Rana
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usb: dwc3-msm: Clear pending power events before setting irq mask



commit 9c07090e4f54 ("usb: dwc3-msm: Set in_lpm only after turning off
clocks") disables power event irq before setting OUT L2/P3 event irq mask
and enables later. Upon cable disconnect dwc3_otg_start_peripheral()
resumes SS phy which results into OUT P3 irq as soon as OUT P3 mask is
set upon controller suspend. Since power event irq is disabled, interrupt
remains pending until power event irq gets enabled, this causes controller
to exit from low power mode right after it goes to LPM.

CRs-Fixed: 844372
Change-Id: I138650e945639f82ce8d3c42c1336f3205bd2530
Signed-off-by: default avatarHemant Kumar <hemantk@codeaurora.org>
parent 8d8e42e4
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+14 −18
Original line number Diff line number Diff line
@@ -1535,27 +1535,23 @@ static int dwc3_msm_prepare_suspend(struct dwc3_msm *mdwc)

static void dwc3_msm_wake_interrupt_enable(struct dwc3_msm *mdwc, bool on)
{
	u32 irq_mask;

	if (on) {
		/* Enable P3 and L2 OUT events */
		irq_mask = dwc3_msm_read_reg(mdwc->base, PWR_EVNT_IRQ_MASK_REG);
		irq_mask |= PWR_EVNT_LPM_OUT_L2_MASK |
				PWR_EVNT_POWERDOWN_OUT_P3_MASK;
		dwc3_msm_write_reg(mdwc->base, PWR_EVNT_IRQ_MASK_REG, irq_mask);
	} else {
		static const u32 pwr_events = PWR_EVNT_POWERDOWN_OUT_P3_MASK |
	u32 irq_mask, irq_stat;
	u32 wakeup_events = PWR_EVNT_POWERDOWN_OUT_P3_MASK |
		PWR_EVNT_LPM_OUT_L2_MASK;

		/* Disable P3 and L2 OUT events */
	irq_stat = dwc3_msm_read_reg(mdwc->base, PWR_EVNT_IRQ_STAT_REG);

	/* clear pending interrupts */
	dwc3_msm_write_reg(mdwc->base, PWR_EVNT_IRQ_STAT_REG, irq_stat);

	irq_mask = dwc3_msm_read_reg(mdwc->base, PWR_EVNT_IRQ_MASK_REG);
		irq_mask &= ~pwr_events;
		dwc3_msm_write_reg(mdwc->base, PWR_EVNT_IRQ_MASK_REG, irq_mask);

		/* Clear the P3 and L2 OUT status */
		dwc3_msm_write_reg(mdwc->base, PWR_EVNT_IRQ_STAT_REG,
				   pwr_events);
	}
	if (on) /* Enable P3 and L2 OUT events */
		irq_mask |= wakeup_events;
	else /* Disable P3 and L2 OUT events */
		irq_mask &= ~wakeup_events;

	dwc3_msm_write_reg(mdwc->base, PWR_EVNT_IRQ_MASK_REG, irq_mask);
}

static void dwc3_msm_bus_vote_w(struct work_struct *w)