Loading arch/arm/boot/dts/qcom/msm-gdsc-cobalt.dtsi 0 → 100644 +146 −0 Original line number Diff line number Diff line /* * Copyright (c) 2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { /* GCC GDSCs */ gdsc_mmss: qcom,gdsc@109004 { compatible = "regulator-fixed"; regulator-name = "gdsc_mmss"; reg = <0x109004 0x4>; status = "disabled"; }; gdsc_usb30: qcom,gdsc@10f004 { compatible = "regulator-fixed"; regulator-name = "gdsc_usb30"; reg = <0x10f004 0x4>; status = "disabled"; }; gdsc_pcie_0: qcom,gdsc@16b004 { compatible = "regulator-fixed"; regulator-name = "gdsc_pcie_0"; reg = <0x16b004 0x4>; status = "disabled"; }; gdsc_ufs: qcom,gdsc@175004 { compatible = "regulator-fixed"; regulator-name = "gdsc_ufs"; reg = <0x175004 0x4>; status = "disabled"; }; gdsc_hlos1_vote_gpu_smmu: qcom,gdsc@17d024 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_gpu_smmu"; reg = <0x17d024 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; gdsc_hlos1_vote_lpass_adsp: qcom,gdsc@17d034 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_lpass_adsp"; reg = <0x17d034 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; gdsc_hlos1_vote_lpass_core: qcom,gdsc@17d038 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_lpass_core"; reg = <0x17d038 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; /* MMSS GDSCs */ gdsc_bimc_smmu: qcom,gdsc@c8ce020 { compatible = "regulator-fixed"; regulator-name = "gdsc_bimc_smmu"; reg = <0xc8ce020 0x4>; status = "disabled"; }; gdsc_venus: qcom,gdsc@c8c1024 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus"; reg = <0xc8c1024 0x4>; status = "disabled"; }; gdsc_venus_core0: qcom,gdsc@c8c1040 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus_core0"; reg = <0xc8c1040 0x4>; status = "disabled"; }; gdsc_venus_core1: qcom,gdsc@c8c1044 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus_core1"; reg = <0xc8c1044 0x4>; status = "disabled"; }; gdsc_camss_top: qcom,gdsc@c8c34a0 { compatible = "regulator-fixed"; regulator-name = "gdsc_camss_top"; reg = <0xc8c34a0 0x4>; status = "disabled"; }; gdsc_vfe0: qcom,gdsc@c8c3664 { compatible = "regulator-fixed"; regulator-name = "gdsc_vfe0"; reg = <0xc8c3664 0x4>; status = "disabled"; }; gdsc_vfe1: qcom,gdsc@c8c3674 { compatible = "regulator-fixed"; regulator-name = "gdsc_vfe1"; reg = <0xc8c3674 0x4>; status = "disabled"; }; gdsc_cpp: qcom,gdsc@c8c36d4 { compatible = "regulator-fixed"; regulator-name = "gdsc_cpp"; reg = <0xc8c36d4 0x4>; status = "disabled"; }; gdsc_mdss: qcom,gdsc@c8c2304 { compatible = "regulator-fixed"; regulator-name = "gdsc_mdss"; reg = <0xc8c2304 0x4>; status = "disabled"; }; /* GPU GDSCs */ gdsc_gpu_cx: qcom,gdsc@5066004 { compatible = "regulator-fixed"; regulator-name = "gdsc_gpu_cx"; reg = <0x5066004 0x4>; status = "disabled"; }; gdsc_gpu_gx: qcom,gdsc@5066094 { compatible = "regulator-fixed"; regulator-name = "gdsc_gpu_gx"; reg = <0x5066094 0x4>; status = "disabled"; }; }; arch/arm/boot/dts/qcom/msmcobalt.dtsi +73 −0 Original line number Diff line number Diff line Loading @@ -122,6 +122,7 @@ }; #include "msmcobalt-smp2p.dtsi" #include "msm-gdsc-cobalt.dtsi" &soc { #address-cells = <1>; Loading Loading @@ -530,3 +531,75 @@ }; #include "msmcobalt-regulator.dtsi" &gdsc_mmss { status = "ok"; }; &gdsc_usb30 { status = "ok"; }; &gdsc_pcie_0 { status = "ok"; }; &gdsc_ufs { status = "ok"; }; &gdsc_bimc_smmu { status = "ok"; }; &gdsc_hlos1_vote_gpu_smmu { status = "ok"; }; &gdsc_hlos1_vote_lpass_adsp { status = "ok"; }; &gdsc_hlos1_vote_lpass_core { status = "ok"; }; &gdsc_venus { status = "ok"; }; &gdsc_venus_core0 { status = "ok"; }; &gdsc_venus_core1 { status = "ok"; }; &gdsc_camss_top { status = "ok"; }; &gdsc_vfe0 { status = "ok"; }; &gdsc_vfe1 { status = "ok"; }; &gdsc_cpp { status = "ok"; }; &gdsc_mdss { status = "ok"; }; &gdsc_gpu_gx { status = "ok"; }; &gdsc_gpu_cx { status = "ok"; }; Loading
arch/arm/boot/dts/qcom/msm-gdsc-cobalt.dtsi 0 → 100644 +146 −0 Original line number Diff line number Diff line /* * Copyright (c) 2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ &soc { /* GCC GDSCs */ gdsc_mmss: qcom,gdsc@109004 { compatible = "regulator-fixed"; regulator-name = "gdsc_mmss"; reg = <0x109004 0x4>; status = "disabled"; }; gdsc_usb30: qcom,gdsc@10f004 { compatible = "regulator-fixed"; regulator-name = "gdsc_usb30"; reg = <0x10f004 0x4>; status = "disabled"; }; gdsc_pcie_0: qcom,gdsc@16b004 { compatible = "regulator-fixed"; regulator-name = "gdsc_pcie_0"; reg = <0x16b004 0x4>; status = "disabled"; }; gdsc_ufs: qcom,gdsc@175004 { compatible = "regulator-fixed"; regulator-name = "gdsc_ufs"; reg = <0x175004 0x4>; status = "disabled"; }; gdsc_hlos1_vote_gpu_smmu: qcom,gdsc@17d024 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_gpu_smmu"; reg = <0x17d024 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; gdsc_hlos1_vote_lpass_adsp: qcom,gdsc@17d034 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_lpass_adsp"; reg = <0x17d034 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; gdsc_hlos1_vote_lpass_core: qcom,gdsc@17d038 { compatible = "regulator-fixed"; regulator-name = "gdsc_hlos1_vote_lpass_core"; reg = <0x17d038 0x4>; qcom,no-status-check-on-disable; status = "disabled"; }; /* MMSS GDSCs */ gdsc_bimc_smmu: qcom,gdsc@c8ce020 { compatible = "regulator-fixed"; regulator-name = "gdsc_bimc_smmu"; reg = <0xc8ce020 0x4>; status = "disabled"; }; gdsc_venus: qcom,gdsc@c8c1024 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus"; reg = <0xc8c1024 0x4>; status = "disabled"; }; gdsc_venus_core0: qcom,gdsc@c8c1040 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus_core0"; reg = <0xc8c1040 0x4>; status = "disabled"; }; gdsc_venus_core1: qcom,gdsc@c8c1044 { compatible = "regulator-fixed"; regulator-name = "gdsc_venus_core1"; reg = <0xc8c1044 0x4>; status = "disabled"; }; gdsc_camss_top: qcom,gdsc@c8c34a0 { compatible = "regulator-fixed"; regulator-name = "gdsc_camss_top"; reg = <0xc8c34a0 0x4>; status = "disabled"; }; gdsc_vfe0: qcom,gdsc@c8c3664 { compatible = "regulator-fixed"; regulator-name = "gdsc_vfe0"; reg = <0xc8c3664 0x4>; status = "disabled"; }; gdsc_vfe1: qcom,gdsc@c8c3674 { compatible = "regulator-fixed"; regulator-name = "gdsc_vfe1"; reg = <0xc8c3674 0x4>; status = "disabled"; }; gdsc_cpp: qcom,gdsc@c8c36d4 { compatible = "regulator-fixed"; regulator-name = "gdsc_cpp"; reg = <0xc8c36d4 0x4>; status = "disabled"; }; gdsc_mdss: qcom,gdsc@c8c2304 { compatible = "regulator-fixed"; regulator-name = "gdsc_mdss"; reg = <0xc8c2304 0x4>; status = "disabled"; }; /* GPU GDSCs */ gdsc_gpu_cx: qcom,gdsc@5066004 { compatible = "regulator-fixed"; regulator-name = "gdsc_gpu_cx"; reg = <0x5066004 0x4>; status = "disabled"; }; gdsc_gpu_gx: qcom,gdsc@5066094 { compatible = "regulator-fixed"; regulator-name = "gdsc_gpu_gx"; reg = <0x5066094 0x4>; status = "disabled"; }; };
arch/arm/boot/dts/qcom/msmcobalt.dtsi +73 −0 Original line number Diff line number Diff line Loading @@ -122,6 +122,7 @@ }; #include "msmcobalt-smp2p.dtsi" #include "msm-gdsc-cobalt.dtsi" &soc { #address-cells = <1>; Loading Loading @@ -530,3 +531,75 @@ }; #include "msmcobalt-regulator.dtsi" &gdsc_mmss { status = "ok"; }; &gdsc_usb30 { status = "ok"; }; &gdsc_pcie_0 { status = "ok"; }; &gdsc_ufs { status = "ok"; }; &gdsc_bimc_smmu { status = "ok"; }; &gdsc_hlos1_vote_gpu_smmu { status = "ok"; }; &gdsc_hlos1_vote_lpass_adsp { status = "ok"; }; &gdsc_hlos1_vote_lpass_core { status = "ok"; }; &gdsc_venus { status = "ok"; }; &gdsc_venus_core0 { status = "ok"; }; &gdsc_venus_core1 { status = "ok"; }; &gdsc_camss_top { status = "ok"; }; &gdsc_vfe0 { status = "ok"; }; &gdsc_vfe1 { status = "ok"; }; &gdsc_cpp { status = "ok"; }; &gdsc_mdss { status = "ok"; }; &gdsc_gpu_gx { status = "ok"; }; &gdsc_gpu_cx { status = "ok"; };