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Commit 0777c24a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Use macro definitions for interrupts for SMMU"

parents a08721ae 28e4350c

arch/arm/boot/dts/qcom/msm-arm-smmu-8996.dtsi

+89 −27
Original line number Diff line number Diff line
@@ -12,14 +12,20 @@ 


#include "msm-arm-smmu.dtsi"

#include <dt-bindings/msm/msm-bus-ids.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



&anoc0_smmu {

	status = "ok";

	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 362 0>, <0 355 0>, <0 356 0>, <0 357 0>,

		   <0 358 0>, <0 359 0>, <0 360 0>;

	interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_aggre0_noc>;

	clocks = <&clock_gcc clk_gcc_smmu_aggre0_axi_clk>,

		<&clock_gcc clk_gcc_smmu_aggre0_ahb_clk>;
@@ -33,9 +39,15 @@ 
	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 371 0>, <0 364 0>, <0 365 0>, <0 366 0>,

		<0 367 0>, <0 368 0>, <0 369 0>, <0 370 0>,

		<0 431 0>;

	interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;

	#iommu-cells = <1>;

	clocks = <&clock_gcc clk_aggre1_noc_clk>;

	clock-names = "smmu_aggre1_noc_clk";
@@ -47,10 +59,19 @@ 
	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 381 0>, <0 373 0>, <0 374 0>, <0 375 0>,

		<0 376 0>, <0 377 0>, <0 378 0>, <0 462 0>,

		<0 463 0>, <0 464 0>, <0 465 0>, <0 466 0>,

		<0 467 0>;

	interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;

	#iommu-cells = <1>;

	clocks = <&clock_gcc clk_aggre2_noc_clk>;

	clock-names = "smmu_aggre2_noc_clk";
@@ -62,11 +83,23 @@ 
	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 404 0>, <0 226 0>, <0 393 0>, <0 394 0>,

		   <0 395 0>, <0 396 0>, <0 397 0>, <0 398 0>,

		   <0 399 0>, <0 400 0>, <0 401 0>, <0 402 0>,

		   <0 403 0>, <0 137 0>, <0 224 0>, <0 225 0>,

		   <0 310 0>;

	interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_hlos1_vote_lpass_adsp>;

	clocks = <&clock_gcc clk_hlos1_vote_lpass_adsp_smmu_clk>;

	clock-names = "lpass_q6_smmu_clocks";
@@ -79,7 +112,11 @@ 
	qcom,skip-init;

	qcom,fatal-asf;

	#global-interrupts = <1>;

	interrupts = <0 67 0>, <0 69 0>, <0 70 0>, <0 71 0>, <0 72 0>;

	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_camss>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -99,8 +136,11 @@ 
	qcom,skip-init;

	qcom,fatal-asf;

	#global-interrupts = <1>;

	interrupts = <0 76 0>, <0 343 0>, <0 344 0>, <0 345 0>,

		   <0 346 0>;

	interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_camss>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -120,8 +160,11 @@ 
	qcom,skip-init;

	qcom,fatal-asf;

	#global-interrupts = <1>;

	interrupts = <0 264 0>, <0 263 0>, <0 266 0>, <0 267 0>,

		   <0 268 0>;

	interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_camss>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -140,9 +183,18 @@ 
	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 286 0>, <0 335 0>, <0 336 0>, <0 337 0>,

		<0 338 0>, <0 339 0>, <0 340 0>, <0 341 0>, <0 342 0>,

		<0 288 0>, <0 289 0>, <0 290 0>;

	interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_video>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -162,7 +214,11 @@ 
	qcom,skip-init;

	qcom,no-smr-check;

	#global-interrupts = <1>;

	interrupts = <0 73 0>, <0 320 0>, <0 321 0>, <0 322 0>, <0 323 0>;

	interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_mdss>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -181,8 +237,11 @@ 
	qcom,register-save;

	qcom,skip-init;

	#global-interrupts = <1>;

	interrupts = <0 353 0>, <0 348 0>, <0 349 0>, <0 350 0>,

		   <0 351 0>;

	interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_mmagic_mdss>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
@@ -202,8 +261,11 @@ 
	qcom,skip-init;

	qcom,dynamic;

	#global-interrupts = <1>;

	interrupts = <0 334 0>, <0 329 0>, <0 330 0>,

		<0 331 0>, <0 332 0>;

	interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,

		<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;

	vdd-supply = <&gdsc_gpu>;

	clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,

		<&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,