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Commit 069d4e74 authored by Changhwan Youn's avatar Changhwan Youn Committed by Kukjin Kim
Browse files

ARM: EXYNOS4: Remove clock event timers using ARM private timers 



External GIC cannot support PPI (Private Peripheral Interrupt) for
ARM private timers. Thus MCT should be selected as clock event timers
by default.

Signed-off-by: default avatarChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent aab74d3e

arch/arm/mach-exynos4/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ config CPU_EXYNOS4210 
	  Enable EXYNOS4210 CPU support



config EXYNOS4_MCT

	bool "Kernel timer support by MCT"

	bool

	default y

	help

	  Use MCT (Multi Core Timer) as kernel timers

arch/arm/mach-exynos4/Makefile

+1 −6
Original line number Diff line number Diff line
@@ -20,12 +20,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o 


obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o



ifeq ($(CONFIG_EXYNOS4_MCT),y)

obj-y				+= mct.o

else

obj-y				+= time.o

obj-$(CONFIG_LOCAL_TIMERS)	+= localtimer.o

endif

obj-$(CONFIG_EXYNOS4_MCT)	+= mct.o



obj-$(CONFIG_HOTPLUG_CPU)	+= hotplug.o

arch/arm/mach-exynos4/cpu.c

+1 −1
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ void __init exynos4_init_irq(void) 
{

	int irq;



	gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);

	gic_init(0, IRQ_SPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);

	gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;



	for (irq = 0; irq < MAX_COMBINER_NR; irq++) {

arch/arm/mach-exynos4/include/mach/entry-macro.S

+0 −6
Original line number Diff line number Diff line
@@ -80,10 +80,4 @@ 
		/* As above, this assumes that irqstat and base are preserved.. */



		.macro test_for_ltirq, irqnr, irqstat, base, tmp

		bic	\irqnr, \irqstat, #0x1c00

		mov	\tmp, #0

		cmp	\irqnr, #29

		moveq	\tmp, #1

		streq	\irqstat, [\base, #GIC_CPU_EOI]

		cmp	\tmp, #0

		.endm

arch/arm/mach-exynos4/include/mach/irqs.h

+0 −2
Original line number Diff line number Diff line
@@ -19,8 +19,6 @@ 


#define IRQ_PPI(x)		S5P_IRQ(x+16)



#define IRQ_LOCALTIMER		IRQ_PPI(13)



/* SPI: Shared Peripheral Interrupt */



#define IRQ_SPI(x)		S5P_IRQ(x+32)