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Commit 05842a32 authored by Ranjith Lohithakshan's avatar Ranjith Lohithakshan Committed by Paul Walmsley
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AM35xx: Add AM35xx specific control module registers 



AM3517/05 has a few additional control module registers defined mainly
to control the new IP's. This patch adds support for those new registers.

Signed-off-by: default avatarRanjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 8a3ddc75

arch/arm/plat-omap/include/plat/control.h

+17 −0
Original line number Diff line number Diff line
@@ -160,6 +160,14 @@ 
#define OMAP343X_CONTROL_SRAMLDO5	(OMAP2_CONTROL_GENERAL + 0x02C0)

#define OMAP343X_CONTROL_CSI		(OMAP2_CONTROL_GENERAL + 0x02C4)



/* AM35XX only CONTROL_GENERAL register offsets */

#define AM35XX_CONTROL_MSUSPENDMUX_6    (OMAP2_CONTROL_GENERAL + 0x0038)

#define AM35XX_CONTROL_DEVCONF2         (OMAP2_CONTROL_GENERAL + 0x0310)

#define AM35XX_CONTROL_DEVCONF3         (OMAP2_CONTROL_GENERAL + 0x0314)

#define AM35XX_CONTROL_CBA_PRIORITY     (OMAP2_CONTROL_GENERAL + 0x0320)

#define AM35XX_CONTROL_LVL_INTR_CLEAR   (OMAP2_CONTROL_GENERAL + 0x0324)

#define AM35XX_CONTROL_IP_SW_RESET      (OMAP2_CONTROL_GENERAL + 0x0328)

#define AM35XX_CONTROL_IPSS_CLK_CTRL    (OMAP2_CONTROL_GENERAL + 0x032C)



/* 34xx PADCONF register offsets */

#define OMAP343X_PADCONF_ETK(i)		(OMAP2_CONTROL_PADCONFS + 0x5a8 + \
@@ -257,6 +265,15 @@ 
#define OMAP343X_SCRATCHPAD		(OMAP343X_CTRL_BASE + 0x910)

#define OMAP343X_SCRATCHPAD_ROM_OFFSET	0x19C



/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */

#define AM35XX_USBOTG_VBUSP_CLK_SHIFT   0

#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT   1

#define AM35XX_VPFE_VBUSP_CLK_SHIFT     2

#define AM35XX_HECC_VBUSP_CLK_SHIFT     3

#define AM35XX_USBOTG_FCLK_SHIFT        8

#define AM35XX_CPGMAC_FCLK_SHIFT        9

#define AM35XX_VPFE_FCLK_SHIFT          10



/*

 * CONTROL OMAP STATUS register to identify OMAP3 features

 */