Loading Documentation/devicetree/bindings/platform/msm/ipa.txt +2 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,8 @@ memory allocation over a PCIe bridge configures embedded pipe filtering rules - qcom,skip-uc-pipe-reset: Boolean context flag to indicate whether a pipe reset via the IPA uC is required - qcom,ipa-wdi2: Boolean context flag to indicate whether using wdi-2.0 or not - qcom,use-dma-zone: Boolean context flag to indicate whether memory allocations controlled by IPA driver that do not specify a struct device * should use GFP_DMA to Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +9 −0 Original line number Diff line number Diff line Loading @@ -3974,6 +3974,7 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, ipa3_ctx->use_ipa_teth_bridge = resource_p->use_ipa_teth_bridge; ipa3_ctx->ipa_bam_remote_mode = resource_p->ipa_bam_remote_mode; ipa3_ctx->modem_cfg_emb_pipe_flt = resource_p->modem_cfg_emb_pipe_flt; ipa3_ctx->ipa_wdi2 = resource_p->ipa_wdi2; ipa3_ctx->wan_rx_ring_size = resource_p->wan_rx_ring_size; ipa3_ctx->skip_uc_pipe_reset = resource_p->skip_uc_pipe_reset; ipa3_ctx->tethered_flow_control = resource_p->tethered_flow_control; Loading Loading @@ -4477,6 +4478,7 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, ipa_drv_res->ipa3_hw_mode = 0; ipa_drv_res->ipa_bam_remote_mode = false; ipa_drv_res->modem_cfg_emb_pipe_flt = false; ipa_drv_res->ipa_wdi2 = false; ipa_drv_res->wan_rx_ring_size = IPA_GENERIC_RX_POOL_SZ; ipa_drv_res->apply_rg10_wa = false; Loading Loading @@ -4537,6 +4539,13 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, ipa_drv_res->modem_cfg_emb_pipe_flt ? "True" : "False"); ipa_drv_res->ipa_wdi2 = of_property_read_bool(pdev->dev.of_node, "qcom,ipa-wdi2"); IPADBG(": WDI-2.0 = %s\n", ipa_drv_res->ipa_wdi2 ? "True" : "False"); ipa_drv_res->skip_uc_pipe_reset = of_property_read_bool(pdev->dev.of_node, "qcom,skip-uc-pipe-reset"); Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +3 −0 Original line number Diff line number Diff line Loading @@ -1415,6 +1415,7 @@ struct ipa3_ready_cb_info { * @modem_cfg_emb_pipe_flt: modem configure embedded pipe filtering rules * @logbuf: ipc log buffer for high priority messages * @logbuf_low: ipc log buffer for low priority messages * @ipa_wdi2: using wdi-2.0 * @ipa_bus_hdl: msm driver handle for the data path bus * @ctrl: holds the core specific operations based on * core version (vtable like) Loading Loading @@ -1511,6 +1512,7 @@ struct ipa3_context { bool use_ipa_teth_bridge; bool ipa_bam_remote_mode; bool modem_cfg_emb_pipe_flt; bool ipa_wdi2; /* featurize if memory footprint becomes a concern */ struct ipa3_stats stats; void *smem_pipe_mem; Loading Loading @@ -1586,6 +1588,7 @@ struct ipa3_plat_drv_res { u32 ee; bool ipa_bam_remote_mode; bool modem_cfg_emb_pipe_flt; bool ipa_wdi2; u32 wan_rx_ring_size; bool skip_uc_pipe_reset; enum ipa_transport_type transport_prototype; Loading drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c +288 −72 Original line number Diff line number Diff line Loading @@ -27,10 +27,12 @@ #define IPA_WDI_RX_RING_RES 0 #define IPA_WDI_RX_RING_RP_RES 1 #define IPA_WDI_TX_RING_RES 2 #define IPA_WDI_CE_RING_RES 3 #define IPA_WDI_CE_DB_RES 4 #define IPA_WDI_MAX_RES 5 #define IPA_WDI_RX_COMP_RING_RES 2 #define IPA_WDI_RX_COMP_RING_WP_RES 3 #define IPA_WDI_TX_RING_RES 4 #define IPA_WDI_CE_RING_RES 5 #define IPA_WDI_CE_DB_RES 6 #define IPA_WDI_MAX_RES 7 struct ipa_wdi_res { struct ipa_wdi_buffer_info *res; Loading Loading @@ -232,6 +234,21 @@ struct IpaHwWdiTxSetUpCmdData_t { u8 reserved; } __packed; struct IpaHwWdi2TxSetUpCmdData_t { u32 comp_ring_base_pa; u32 comp_ring_base_pa_hi; u16 comp_ring_size; u16 reserved_comp_ring; u32 ce_ring_base_pa; u32 ce_ring_base_pa_hi; u16 ce_ring_size; u16 reserved_ce_ring; u32 ce_ring_doorbell_pa; u32 ce_ring_doorbell_pa_hi; u16 num_tx_buffers; u8 ipa_pipe_number; u8 reserved; } __packed; /** * struct IpaHwWdiRxSetUpCmdData_t - Structure holding the parameters for * IPA_CPU_2_HW_CMD_WDI_RX_SET_UP command. Loading @@ -253,6 +270,19 @@ struct IpaHwWdiRxSetUpCmdData_t { u8 ipa_pipe_number; } __packed; struct IpaHwWdi2RxSetUpCmdData_t { u32 rx_ring_base_pa; u32 rx_ring_base_pa_hi; u32 rx_ring_size; u32 rx_ring_rp_pa; u32 rx_ring_rp_pa_hi; u32 rx_comp_ring_base_pa; u32 rx_comp_ring_base_pa_hi; u32 rx_comp_ring_size; u32 rx_comp_ring_wp_pa; u32 rx_comp_ring_wp_pa_hi; u8 ipa_pipe_number; } __packed; /** * union IpaHwWdiRxExtCfgCmdData_t - Structure holding the parameters for * IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG command. Loading Loading @@ -554,6 +584,9 @@ static void ipa_release_uc_smmu_mappings(enum ipa_client_type client) end = IPA_WDI_CE_DB_RES; } else { start = IPA_WDI_RX_RING_RES; if (ipa3_ctx->ipa_wdi2) end = IPA_WDI_RX_COMP_RING_WP_RES; else end = IPA_WDI_RX_RING_RP_RES; } Loading Loading @@ -656,6 +689,7 @@ static int ipa_create_uc_smmu_mapping(int res_idx, bool wlan_smmu_en, if (wlan_smmu_en && ipa3_ctx->smmu_present) { switch (res_idx) { case IPA_WDI_RX_RING_RP_RES: case IPA_WDI_RX_COMP_RING_WP_RES: case IPA_WDI_CE_DB_RES: if (ipa_create_uc_smmu_mapping_pa(pa, len, (res_idx == IPA_WDI_CE_DB_RES) ? true : false, Loading @@ -667,6 +701,7 @@ static int ipa_create_uc_smmu_mapping(int res_idx, bool wlan_smmu_en, ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len); break; case IPA_WDI_RX_RING_RES: case IPA_WDI_RX_COMP_RING_RES: case IPA_WDI_TX_RING_RES: case IPA_WDI_CE_RING_RES: if (ipa_create_uc_smmu_mapping_sgt(sgt, iova)) { Loading Loading @@ -702,6 +737,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, struct ipa3_mem_buffer cmd; struct IpaHwWdiTxSetUpCmdData_t *tx; struct IpaHwWdiRxSetUpCmdData_t *rx; struct IpaHwWdi2TxSetUpCmdData_t *tx_2; struct IpaHwWdi2RxSetUpCmdData_t *rx_2; struct ipa_ep_cfg_ctrl ep_cfg_ctrl; unsigned long va; phys_addr_t pa; Loading Loading @@ -749,6 +787,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, IPADBG("client=%d ep=%d\n", in->sys.client, ipa_ep_idx); if (IPA_CLIENT_IS_CONS(in->sys.client)) { if (ipa3_ctx->ipa_wdi2) cmd.size = sizeof(*tx_2); else cmd.size = sizeof(*tx); IPADBG("comp_ring_base_pa=0x%pa\n", &in->u.dl.comp_ring_base_pa); Loading @@ -759,6 +800,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, &in->u.dl.ce_door_bell_pa); IPADBG("num_tx_buffers=%d\n", in->u.dl.num_tx_buffers); } else { if (ipa3_ctx->ipa_wdi2) cmd.size = sizeof(*rx_2); else cmd.size = sizeof(*rx); IPADBG("rx_ring_base_pa=0x%pa\n", &in->u.ul.rdy_ring_base_pa); IPADBG("rx_ring_size=%d\n", in->u.ul.rdy_ring_size); Loading @@ -774,11 +818,88 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } if (IPA_CLIENT_IS_CONS(in->sys.client)) { if (ipa3_ctx->ipa_wdi2) { tx_2 = (struct IpaHwWdi2TxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size : in->u.dl.comp_ring_size; IPADBG("TX_2 ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.comp_ring_size, in->u.dl.comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES, in->smmu_enabled, in->u.dl.comp_ring_base_pa, &in->u.dl_smmu.comp_ring, len, false, &va)) { IPAERR("fail to create uc mapping TX ring.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->comp_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->comp_ring_base_pa = (u32) (va & 0xFFFFFFFF); tx_2->comp_ring_size = len; IPADBG("TX_2 comp_ring_base_pa_hi=0x%08x :0x%08x\n", tx_2->comp_ring_base_pa_hi, tx_2->comp_ring_base_pa); len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size : in->u.dl.ce_ring_size; IPADBG("TX_2 CE ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.ce_ring_size, in->u.dl.ce_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_RING_RES, in->smmu_enabled, in->u.dl.ce_ring_base_pa, &in->u.dl_smmu.ce_ring, len, false, &va)) { IPAERR("fail to create uc mapping CE ring.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->ce_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->ce_ring_base_pa = (u32) (va & 0xFFFFFFFF); tx_2->ce_ring_size = len; IPADBG("TX_2 ce_ring_base_pa_hi=0x%08x :0x%08x\n", tx_2->ce_ring_base_pa_hi, tx_2->ce_ring_base_pa); pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa : in->u.dl.ce_door_bell_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES, in->smmu_enabled, pa, NULL, 4, true, &va)) { IPAERR("fail to create uc mapping CE DB.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->ce_ring_doorbell_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->ce_ring_doorbell_pa = (u32) (va & 0xFFFFFFFF); IPADBG("TX_2 ce_ring_doorbell_pa_hi=0x%08x :0x%08x\n", tx_2->ce_ring_doorbell_pa_hi, tx_2->ce_ring_doorbell_pa); tx_2->num_tx_buffers = in->u.dl.num_tx_buffers; tx_2->ipa_pipe_number = ipa_ep_idx; } else { tx = (struct IpaHwWdiTxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size : in->u.dl.comp_ring_size; IPADBG("TX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, IPADBG("TX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.comp_ring_size, in->u.dl.comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES, Loading @@ -794,7 +915,6 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } tx->comp_ring_base_pa = va; tx->comp_ring_size = len; len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size : in->u.dl.ce_ring_size; IPADBG("TX CE ring smmu_en=%d ring_size=%d %d\n", Loading @@ -814,7 +934,6 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } tx->ce_ring_base_pa = va; tx->ce_ring_size = len; pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa : in->u.dl.ce_door_bell_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES, Loading @@ -829,20 +948,117 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, goto uc_timeout; } tx->ce_ring_doorbell_pa = va; tx->num_tx_buffers = in->u.dl.num_tx_buffers; tx->ipa_pipe_number = ipa_ep_idx; } out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base + ipahal_get_reg_base() + ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n, IPA_HW_WDI_TX_MBOX_START_INDEX/32, IPA_HW_WDI_TX_MBOX_START_INDEX % 32); } else { if (ipa3_ctx->ipa_wdi2) { rx_2 = (struct IpaHwWdi2RxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size : in->u.ul.rdy_ring_size; IPADBG("RX_2 ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_ring_size, in->u.ul.rdy_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES, in->smmu_enabled, in->u.ul.rdy_ring_base_pa, &in->u.ul_smmu.rdy_ring, len, false, &va)) { IPAERR("fail to create uc RX_2 ring.\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_ring_base_pa = (u32) (va & 0xFFFFFFFF); rx_2->rx_ring_size = len; IPADBG("RX_2 rx_ring_base_pa_hi=0x%08x:0x%08x\n", rx_2->rx_ring_base_pa_hi, rx_2->rx_ring_base_pa); pa = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_rp_pa : in->u.ul.rdy_ring_rp_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RP_RES, in->smmu_enabled, pa, NULL, 4, false, &va)) { IPAERR("fail to create uc RX_2 rng RP\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_ring_rp_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_ring_rp_pa = (u32) (va & 0xFFFFFFFF); IPADBG("RX_2 rx_ring_rp_pa_hi=0x%08x :0x%08x\n", rx_2->rx_ring_rp_pa_hi, rx_2->rx_ring_rp_pa); len = in->smmu_enabled ? in->u.ul_smmu.rdy_comp_ring_size : in->u.ul.rdy_comp_ring_size; IPADBG("RX_2 ring smmu_en=%d comp_ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_comp_ring_size, in->u.ul.rdy_comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_COMP_RING_RES, in->smmu_enabled, in->u.ul.rdy_comp_ring_base_pa, &in->u.ul_smmu.rdy_comp_ring, len, false, &va)) { IPAERR("fail to create uc RX_2 comp_ring.\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_comp_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_comp_ring_base_pa = (u32) (va & 0xFFFFFFFF); rx_2->rx_comp_ring_size = len; IPADBG("RX_2 rx_comp_ring_base_pa_hi=0x%08x:0x%08x\n", rx_2->rx_comp_ring_base_pa_hi, rx_2->rx_comp_ring_base_pa); pa = in->smmu_enabled ? in->u.ul_smmu.rdy_comp_ring_wp_pa : in->u.ul.rdy_comp_ring_wp_pa; if (ipa_create_uc_smmu_mapping( IPA_WDI_RX_COMP_RING_WP_RES, in->smmu_enabled, pa, NULL, 4, false, &va)) { IPAERR("fail to create uc RX_2 comp_rng WP\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_comp_ring_wp_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_comp_ring_wp_pa = (u32) (va & 0xFFFFFFFF); IPADBG("RX_2 rx_comp_ring_wp_pa_hi=0x%08x:0x%08x\n", rx_2->rx_comp_ring_wp_pa_hi, rx_2->rx_comp_ring_wp_pa); rx_2->ipa_pipe_number = ipa_ep_idx; } else { rx = (struct IpaHwWdiRxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size : in->u.ul.rdy_ring_size; IPADBG("RX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, IPADBG("RX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_ring_size, in->u.ul.rdy_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES, Loading Loading @@ -873,8 +1089,8 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, goto uc_timeout; } rx->rx_ring_rp_pa = va; rx->ipa_pipe_number = ipa_ep_idx; } out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base + ipahal_get_reg_base() + ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n, Loading Loading
Documentation/devicetree/bindings/platform/msm/ipa.txt +2 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,8 @@ memory allocation over a PCIe bridge configures embedded pipe filtering rules - qcom,skip-uc-pipe-reset: Boolean context flag to indicate whether a pipe reset via the IPA uC is required - qcom,ipa-wdi2: Boolean context flag to indicate whether using wdi-2.0 or not - qcom,use-dma-zone: Boolean context flag to indicate whether memory allocations controlled by IPA driver that do not specify a struct device * should use GFP_DMA to Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +9 −0 Original line number Diff line number Diff line Loading @@ -3974,6 +3974,7 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, ipa3_ctx->use_ipa_teth_bridge = resource_p->use_ipa_teth_bridge; ipa3_ctx->ipa_bam_remote_mode = resource_p->ipa_bam_remote_mode; ipa3_ctx->modem_cfg_emb_pipe_flt = resource_p->modem_cfg_emb_pipe_flt; ipa3_ctx->ipa_wdi2 = resource_p->ipa_wdi2; ipa3_ctx->wan_rx_ring_size = resource_p->wan_rx_ring_size; ipa3_ctx->skip_uc_pipe_reset = resource_p->skip_uc_pipe_reset; ipa3_ctx->tethered_flow_control = resource_p->tethered_flow_control; Loading Loading @@ -4477,6 +4478,7 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, ipa_drv_res->ipa3_hw_mode = 0; ipa_drv_res->ipa_bam_remote_mode = false; ipa_drv_res->modem_cfg_emb_pipe_flt = false; ipa_drv_res->ipa_wdi2 = false; ipa_drv_res->wan_rx_ring_size = IPA_GENERIC_RX_POOL_SZ; ipa_drv_res->apply_rg10_wa = false; Loading Loading @@ -4537,6 +4539,13 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, ipa_drv_res->modem_cfg_emb_pipe_flt ? "True" : "False"); ipa_drv_res->ipa_wdi2 = of_property_read_bool(pdev->dev.of_node, "qcom,ipa-wdi2"); IPADBG(": WDI-2.0 = %s\n", ipa_drv_res->ipa_wdi2 ? "True" : "False"); ipa_drv_res->skip_uc_pipe_reset = of_property_read_bool(pdev->dev.of_node, "qcom,skip-uc-pipe-reset"); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +3 −0 Original line number Diff line number Diff line Loading @@ -1415,6 +1415,7 @@ struct ipa3_ready_cb_info { * @modem_cfg_emb_pipe_flt: modem configure embedded pipe filtering rules * @logbuf: ipc log buffer for high priority messages * @logbuf_low: ipc log buffer for low priority messages * @ipa_wdi2: using wdi-2.0 * @ipa_bus_hdl: msm driver handle for the data path bus * @ctrl: holds the core specific operations based on * core version (vtable like) Loading Loading @@ -1511,6 +1512,7 @@ struct ipa3_context { bool use_ipa_teth_bridge; bool ipa_bam_remote_mode; bool modem_cfg_emb_pipe_flt; bool ipa_wdi2; /* featurize if memory footprint becomes a concern */ struct ipa3_stats stats; void *smem_pipe_mem; Loading Loading @@ -1586,6 +1588,7 @@ struct ipa3_plat_drv_res { u32 ee; bool ipa_bam_remote_mode; bool modem_cfg_emb_pipe_flt; bool ipa_wdi2; u32 wan_rx_ring_size; bool skip_uc_pipe_reset; enum ipa_transport_type transport_prototype; Loading
drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c +288 −72 Original line number Diff line number Diff line Loading @@ -27,10 +27,12 @@ #define IPA_WDI_RX_RING_RES 0 #define IPA_WDI_RX_RING_RP_RES 1 #define IPA_WDI_TX_RING_RES 2 #define IPA_WDI_CE_RING_RES 3 #define IPA_WDI_CE_DB_RES 4 #define IPA_WDI_MAX_RES 5 #define IPA_WDI_RX_COMP_RING_RES 2 #define IPA_WDI_RX_COMP_RING_WP_RES 3 #define IPA_WDI_TX_RING_RES 4 #define IPA_WDI_CE_RING_RES 5 #define IPA_WDI_CE_DB_RES 6 #define IPA_WDI_MAX_RES 7 struct ipa_wdi_res { struct ipa_wdi_buffer_info *res; Loading Loading @@ -232,6 +234,21 @@ struct IpaHwWdiTxSetUpCmdData_t { u8 reserved; } __packed; struct IpaHwWdi2TxSetUpCmdData_t { u32 comp_ring_base_pa; u32 comp_ring_base_pa_hi; u16 comp_ring_size; u16 reserved_comp_ring; u32 ce_ring_base_pa; u32 ce_ring_base_pa_hi; u16 ce_ring_size; u16 reserved_ce_ring; u32 ce_ring_doorbell_pa; u32 ce_ring_doorbell_pa_hi; u16 num_tx_buffers; u8 ipa_pipe_number; u8 reserved; } __packed; /** * struct IpaHwWdiRxSetUpCmdData_t - Structure holding the parameters for * IPA_CPU_2_HW_CMD_WDI_RX_SET_UP command. Loading @@ -253,6 +270,19 @@ struct IpaHwWdiRxSetUpCmdData_t { u8 ipa_pipe_number; } __packed; struct IpaHwWdi2RxSetUpCmdData_t { u32 rx_ring_base_pa; u32 rx_ring_base_pa_hi; u32 rx_ring_size; u32 rx_ring_rp_pa; u32 rx_ring_rp_pa_hi; u32 rx_comp_ring_base_pa; u32 rx_comp_ring_base_pa_hi; u32 rx_comp_ring_size; u32 rx_comp_ring_wp_pa; u32 rx_comp_ring_wp_pa_hi; u8 ipa_pipe_number; } __packed; /** * union IpaHwWdiRxExtCfgCmdData_t - Structure holding the parameters for * IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG command. Loading Loading @@ -554,6 +584,9 @@ static void ipa_release_uc_smmu_mappings(enum ipa_client_type client) end = IPA_WDI_CE_DB_RES; } else { start = IPA_WDI_RX_RING_RES; if (ipa3_ctx->ipa_wdi2) end = IPA_WDI_RX_COMP_RING_WP_RES; else end = IPA_WDI_RX_RING_RP_RES; } Loading Loading @@ -656,6 +689,7 @@ static int ipa_create_uc_smmu_mapping(int res_idx, bool wlan_smmu_en, if (wlan_smmu_en && ipa3_ctx->smmu_present) { switch (res_idx) { case IPA_WDI_RX_RING_RP_RES: case IPA_WDI_RX_COMP_RING_WP_RES: case IPA_WDI_CE_DB_RES: if (ipa_create_uc_smmu_mapping_pa(pa, len, (res_idx == IPA_WDI_CE_DB_RES) ? true : false, Loading @@ -667,6 +701,7 @@ static int ipa_create_uc_smmu_mapping(int res_idx, bool wlan_smmu_en, ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len); break; case IPA_WDI_RX_RING_RES: case IPA_WDI_RX_COMP_RING_RES: case IPA_WDI_TX_RING_RES: case IPA_WDI_CE_RING_RES: if (ipa_create_uc_smmu_mapping_sgt(sgt, iova)) { Loading Loading @@ -702,6 +737,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, struct ipa3_mem_buffer cmd; struct IpaHwWdiTxSetUpCmdData_t *tx; struct IpaHwWdiRxSetUpCmdData_t *rx; struct IpaHwWdi2TxSetUpCmdData_t *tx_2; struct IpaHwWdi2RxSetUpCmdData_t *rx_2; struct ipa_ep_cfg_ctrl ep_cfg_ctrl; unsigned long va; phys_addr_t pa; Loading Loading @@ -749,6 +787,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, IPADBG("client=%d ep=%d\n", in->sys.client, ipa_ep_idx); if (IPA_CLIENT_IS_CONS(in->sys.client)) { if (ipa3_ctx->ipa_wdi2) cmd.size = sizeof(*tx_2); else cmd.size = sizeof(*tx); IPADBG("comp_ring_base_pa=0x%pa\n", &in->u.dl.comp_ring_base_pa); Loading @@ -759,6 +800,9 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, &in->u.dl.ce_door_bell_pa); IPADBG("num_tx_buffers=%d\n", in->u.dl.num_tx_buffers); } else { if (ipa3_ctx->ipa_wdi2) cmd.size = sizeof(*rx_2); else cmd.size = sizeof(*rx); IPADBG("rx_ring_base_pa=0x%pa\n", &in->u.ul.rdy_ring_base_pa); IPADBG("rx_ring_size=%d\n", in->u.ul.rdy_ring_size); Loading @@ -774,11 +818,88 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } if (IPA_CLIENT_IS_CONS(in->sys.client)) { if (ipa3_ctx->ipa_wdi2) { tx_2 = (struct IpaHwWdi2TxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size : in->u.dl.comp_ring_size; IPADBG("TX_2 ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.comp_ring_size, in->u.dl.comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES, in->smmu_enabled, in->u.dl.comp_ring_base_pa, &in->u.dl_smmu.comp_ring, len, false, &va)) { IPAERR("fail to create uc mapping TX ring.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->comp_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->comp_ring_base_pa = (u32) (va & 0xFFFFFFFF); tx_2->comp_ring_size = len; IPADBG("TX_2 comp_ring_base_pa_hi=0x%08x :0x%08x\n", tx_2->comp_ring_base_pa_hi, tx_2->comp_ring_base_pa); len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size : in->u.dl.ce_ring_size; IPADBG("TX_2 CE ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.ce_ring_size, in->u.dl.ce_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_RING_RES, in->smmu_enabled, in->u.dl.ce_ring_base_pa, &in->u.dl_smmu.ce_ring, len, false, &va)) { IPAERR("fail to create uc mapping CE ring.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->ce_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->ce_ring_base_pa = (u32) (va & 0xFFFFFFFF); tx_2->ce_ring_size = len; IPADBG("TX_2 ce_ring_base_pa_hi=0x%08x :0x%08x\n", tx_2->ce_ring_base_pa_hi, tx_2->ce_ring_base_pa); pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa : in->u.dl.ce_door_bell_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES, in->smmu_enabled, pa, NULL, 4, true, &va)) { IPAERR("fail to create uc mapping CE DB.\n"); result = -ENOMEM; goto uc_timeout; } tx_2->ce_ring_doorbell_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); tx_2->ce_ring_doorbell_pa = (u32) (va & 0xFFFFFFFF); IPADBG("TX_2 ce_ring_doorbell_pa_hi=0x%08x :0x%08x\n", tx_2->ce_ring_doorbell_pa_hi, tx_2->ce_ring_doorbell_pa); tx_2->num_tx_buffers = in->u.dl.num_tx_buffers; tx_2->ipa_pipe_number = ipa_ep_idx; } else { tx = (struct IpaHwWdiTxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size : in->u.dl.comp_ring_size; IPADBG("TX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, IPADBG("TX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.dl_smmu.comp_ring_size, in->u.dl.comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES, Loading @@ -794,7 +915,6 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } tx->comp_ring_base_pa = va; tx->comp_ring_size = len; len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size : in->u.dl.ce_ring_size; IPADBG("TX CE ring smmu_en=%d ring_size=%d %d\n", Loading @@ -814,7 +934,6 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, } tx->ce_ring_base_pa = va; tx->ce_ring_size = len; pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa : in->u.dl.ce_door_bell_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES, Loading @@ -829,20 +948,117 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, goto uc_timeout; } tx->ce_ring_doorbell_pa = va; tx->num_tx_buffers = in->u.dl.num_tx_buffers; tx->ipa_pipe_number = ipa_ep_idx; } out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base + ipahal_get_reg_base() + ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n, IPA_HW_WDI_TX_MBOX_START_INDEX/32, IPA_HW_WDI_TX_MBOX_START_INDEX % 32); } else { if (ipa3_ctx->ipa_wdi2) { rx_2 = (struct IpaHwWdi2RxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size : in->u.ul.rdy_ring_size; IPADBG("RX_2 ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_ring_size, in->u.ul.rdy_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES, in->smmu_enabled, in->u.ul.rdy_ring_base_pa, &in->u.ul_smmu.rdy_ring, len, false, &va)) { IPAERR("fail to create uc RX_2 ring.\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_ring_base_pa = (u32) (va & 0xFFFFFFFF); rx_2->rx_ring_size = len; IPADBG("RX_2 rx_ring_base_pa_hi=0x%08x:0x%08x\n", rx_2->rx_ring_base_pa_hi, rx_2->rx_ring_base_pa); pa = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_rp_pa : in->u.ul.rdy_ring_rp_pa; if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RP_RES, in->smmu_enabled, pa, NULL, 4, false, &va)) { IPAERR("fail to create uc RX_2 rng RP\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_ring_rp_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_ring_rp_pa = (u32) (va & 0xFFFFFFFF); IPADBG("RX_2 rx_ring_rp_pa_hi=0x%08x :0x%08x\n", rx_2->rx_ring_rp_pa_hi, rx_2->rx_ring_rp_pa); len = in->smmu_enabled ? in->u.ul_smmu.rdy_comp_ring_size : in->u.ul.rdy_comp_ring_size; IPADBG("RX_2 ring smmu_en=%d comp_ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_comp_ring_size, in->u.ul.rdy_comp_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_COMP_RING_RES, in->smmu_enabled, in->u.ul.rdy_comp_ring_base_pa, &in->u.ul_smmu.rdy_comp_ring, len, false, &va)) { IPAERR("fail to create uc RX_2 comp_ring.\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_comp_ring_base_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_comp_ring_base_pa = (u32) (va & 0xFFFFFFFF); rx_2->rx_comp_ring_size = len; IPADBG("RX_2 rx_comp_ring_base_pa_hi=0x%08x:0x%08x\n", rx_2->rx_comp_ring_base_pa_hi, rx_2->rx_comp_ring_base_pa); pa = in->smmu_enabled ? in->u.ul_smmu.rdy_comp_ring_wp_pa : in->u.ul.rdy_comp_ring_wp_pa; if (ipa_create_uc_smmu_mapping( IPA_WDI_RX_COMP_RING_WP_RES, in->smmu_enabled, pa, NULL, 4, false, &va)) { IPAERR("fail to create uc RX_2 comp_rng WP\n"); result = -ENOMEM; goto uc_timeout; } rx_2->rx_comp_ring_wp_pa_hi = (u32) ((va & 0xFFFFFFFF00000000) >> 32); rx_2->rx_comp_ring_wp_pa = (u32) (va & 0xFFFFFFFF); IPADBG("RX_2 rx_comp_ring_wp_pa_hi=0x%08x:0x%08x\n", rx_2->rx_comp_ring_wp_pa_hi, rx_2->rx_comp_ring_wp_pa); rx_2->ipa_pipe_number = ipa_ep_idx; } else { rx = (struct IpaHwWdiRxSetUpCmdData_t *)cmd.base; len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size : in->u.ul.rdy_ring_size; IPADBG("RX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, IPADBG("RX ring smmu_en=%d ring_size=%d %d\n", in->smmu_enabled, in->u.ul_smmu.rdy_ring_size, in->u.ul.rdy_ring_size); if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES, Loading Loading @@ -873,8 +1089,8 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, goto uc_timeout; } rx->rx_ring_rp_pa = va; rx->ipa_pipe_number = ipa_ep_idx; } out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base + ipahal_get_reg_base() + ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n, Loading