Loading drivers/gpu/msm/adreno-gpulist.h +4 −2 Original line number Diff line number Diff line /* Copyright (c) 2002,2007-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2002,2007-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -216,9 +216,11 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .major = 0, .minor = 6, .patchid = ANY_ID, .features = ADRENO_PREEMPTION | ADRENO_64BIT, .features = ADRENO_PREEMPTION | ADRENO_64BIT | ADRENO_CONTENT_PROTECTION | ADRENO_CPZ_RETENTION, .pm4fw_name = "a530_pm4.fw", .pfpfw_name = "a530_pfp.fw", .zap_name = "a506_zap", .gpudev = &adreno_a5xx_gpudev, .gmem_size = (SZ_128K + SZ_8K), .num_protected_regs = 0x20, Loading drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,8 @@ #define ADRENO_LM BIT(8) /* The core uses 64 bit GPU addresses */ #define ADRENO_64BIT BIT(9) /* The GPU supports retention for cpz registers */ #define ADRENO_CPZ_RETENTION BIT(10) /* * Adreno GPU quirks - control bits for various workarounds Loading drivers/gpu/msm/adreno_a5xx.c +4 −2 Original line number Diff line number Diff line Loading @@ -2528,9 +2528,11 @@ static int a5xx_microcode_load(struct adreno_device *adreno_dev, /* * Resume call to write the zap shader base address into the * appropriate register * appropriate register, * skip if retention is supported for the CPZ register */ if (zap_ucode_loaded) { if (zap_ucode_loaded && !(ADRENO_FEATURE(adreno_dev, ADRENO_CPZ_RETENTION))) { int ret; struct scm_desc desc = {0}; Loading Loading
drivers/gpu/msm/adreno-gpulist.h +4 −2 Original line number Diff line number Diff line /* Copyright (c) 2002,2007-2015, The Linux Foundation. All rights reserved. /* Copyright (c) 2002,2007-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -216,9 +216,11 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .major = 0, .minor = 6, .patchid = ANY_ID, .features = ADRENO_PREEMPTION | ADRENO_64BIT, .features = ADRENO_PREEMPTION | ADRENO_64BIT | ADRENO_CONTENT_PROTECTION | ADRENO_CPZ_RETENTION, .pm4fw_name = "a530_pm4.fw", .pfpfw_name = "a530_pfp.fw", .zap_name = "a506_zap", .gpudev = &adreno_a5xx_gpudev, .gmem_size = (SZ_128K + SZ_8K), .num_protected_regs = 0x20, Loading
drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,8 @@ #define ADRENO_LM BIT(8) /* The core uses 64 bit GPU addresses */ #define ADRENO_64BIT BIT(9) /* The GPU supports retention for cpz registers */ #define ADRENO_CPZ_RETENTION BIT(10) /* * Adreno GPU quirks - control bits for various workarounds Loading
drivers/gpu/msm/adreno_a5xx.c +4 −2 Original line number Diff line number Diff line Loading @@ -2528,9 +2528,11 @@ static int a5xx_microcode_load(struct adreno_device *adreno_dev, /* * Resume call to write the zap shader base address into the * appropriate register * appropriate register, * skip if retention is supported for the CPZ register */ if (zap_ucode_loaded) { if (zap_ucode_loaded && !(ADRENO_FEATURE(adreno_dev, ADRENO_CPZ_RETENTION))) { int ret; struct scm_desc desc = {0}; Loading