sh64: Attempt to make reserved insn trap handler resemble C. (0375a73c) · Commits · e / devices / android_kernel_xiaomi_markw

arch/sh/kernel/traps_64.c

+195 −191

Original line number	Diff line number	Diff line
		@@ -32,195 +32,6 @@
		#include <asm/pgtable.h>
		#include <asm/fpu.h>

		static void do_unhandled_exception(int trapnr, int signr, char str, char fn_name,
		unsigned long error_code, struct pt_regs regs, struct task_struct tsk);

		#define DO_ERROR(trapnr, signr, str, name, tsk) \
		asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
		{ \
		do_unhandled_exception(trapnr, signr, str, __stringify(name), error_code, regs, current); \
		}

		DO_ERROR(13, SIGILL, "illegal slot instruction", illegal_slot_inst, current)
		DO_ERROR(87, SIGSEGV, "address error (exec)", address_error_exec, current)


		/* Implement misaligned load/store handling for kernel (and optionally for user
		mode too). Limitation : only SHmedia mode code is handled - there is no
		handling at all for misaligned accesses occurring in SHcompact code yet. */

		static int misaligned_fixup(struct pt_regs *regs);

		asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
		{
		if (misaligned_fixup(regs) < 0) {
		do_unhandled_exception(7, SIGSEGV, "address error(load)",
		"do_address_error_load",
		error_code, regs, current);
		}
		return;
		}

		asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
		{
		if (misaligned_fixup(regs) < 0) {
		do_unhandled_exception(8, SIGSEGV, "address error(store)",
		"do_address_error_store",
		error_code, regs, current);
		}
		return;
		}

		#if defined(CONFIG_SH64_ID2815_WORKAROUND)

		#define OPCODE_INVALID 0
		#define OPCODE_USER_VALID 1
		#define OPCODE_PRIV_VALID 2

		/* getcon/putcon - requires checking which control register is referenced. */
		#define OPCODE_CTRL_REG 3

		/* Table of valid opcodes for SHmedia mode.
		Form a 10-bit value by concatenating the major/minor opcodes i.e.
		opcode[31:26,20:16]. The 6 MSBs of this value index into the following
		array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
		LSBs==4'b0000 etc). */
		static unsigned long shmedia_opcode_table[64] = {
		0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
		0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
		0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
		0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
		0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
		};

		void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
		{
		/* Workaround SH5-101 cut2 silicon defect #2815 :
		in some situations, inter-mode branches from SHcompact -> SHmedia
		which should take ITLBMISS or EXECPROT exceptions at the target
		falsely take RESINST at the target instead. */

		unsigned long opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
		unsigned long pc, aligned_pc;
		int get_user_error;
		int trapnr = 12;
		int signr = SIGILL;
		char *exception_name = "reserved_instruction";

		pc = regs->pc;
		if ((pc & 3) == 1) {
		/* SHmedia : check for defect. This requires executable vmas
		to be readable too. */
		aligned_pc = pc & ~3;
		if (!access_ok(VERIFY_READ, aligned_pc, sizeof(unsigned long))) {
		get_user_error = -EFAULT;
		} else {
		get_user_error = __get_user(opcode, (unsigned long *)aligned_pc);
		}
		if (get_user_error >= 0) {
		unsigned long index, shift;
		unsigned long major, minor, combined;
		unsigned long reserved_field;
		reserved_field = opcode & 0xf; /* These bits are currently reserved as zero in all valid opcodes */
		major = (opcode >> 26) & 0x3f;
		minor = (opcode >> 16) & 0xf;
		combined = (major << 4) \| minor;
		index = major;
		shift = minor << 1;
		if (reserved_field == 0) {
		int opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
		switch (opcode_state) {
		case OPCODE_INVALID:
		/* Trap. */
		break;
		case OPCODE_USER_VALID:
		/* Restart the instruction : the branch to the instruction will now be from an RTE
		not from SHcompact so the silicon defect won't be triggered. */
		return;
		case OPCODE_PRIV_VALID:
		if (!user_mode(regs)) {
		/* Should only ever get here if a module has
		SHcompact code inside it. If so, the same fix up is needed. */
		return; /* same reason */
		}
		/* Otherwise, user mode trying to execute a privileged instruction -
		fall through to trap. */
		break;
		case OPCODE_CTRL_REG:
		/* If in privileged mode, return as above. */
		if (!user_mode(regs)) return;
		/* In user mode ... */
		if (combined == 0x9f) { /* GETCON */
		unsigned long regno = (opcode >> 20) & 0x3f;
		if (regno >= 62) {
		return;
		}
		/* Otherwise, reserved or privileged control register, => trap */
		} else if (combined == 0x1bf) { /* PUTCON */
		unsigned long regno = (opcode >> 4) & 0x3f;
		if (regno >= 62) {
		return;
		}
		/* Otherwise, reserved or privileged control register, => trap */
		} else {
		/* Trap */
		}
		break;
		default:
		/* Fall through to trap. */
		break;
		}
		}
		/* fall through to normal resinst processing */
		} else {
		/* Error trying to read opcode. This typically means a
		real fault, not a RESINST any more. So change the
		codes. */
		trapnr = 87;
		exception_name = "address error (exec)";
		signr = SIGSEGV;
		}
		}

		do_unhandled_exception(trapnr, signr, exception_name, "do_reserved_inst", error_code, regs, current);
		}

		#else /* CONFIG_SH64_ID2815_WORKAROUND */

		/* If the workaround isn't needed, this is just a straightforward reserved
		instruction */
		DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current)

		#endif /* CONFIG_SH64_ID2815_WORKAROUND */

		/* Called with interrupts disabled */
		asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
		{
		die_if_kernel("exception", regs, ex);
		}

		int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
		{
		/* Syscall debug */
		printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);

		die_if_kernel("unknown trapa", regs, scId);

		return -ENOSYS;
		}

		static void do_unhandled_exception(int trapnr, int signr, char str, char fn_name,
		unsigned long error_code, struct pt_regs regs, struct task_struct tsk)
		{
		if (user_mode(regs))
		force_sig(signr, tsk);

		die_if_no_fixup(str, regs, error_code);
		}

		static int read_opcode(reg_size_t pc, insn_size_t *result_opcode, int from_user_mode)
		{
		int get_user_error;
		@@ -784,7 +595,201 @@ static int misaligned_fixup(struct pt_regs *regs)
		regs->pc += 4; /* Skip the instruction that's just been emulated */
		return 0;
		}
		}

		static void do_unhandled_exception(int signr, char *str, unsigned long error,
		struct pt_regs *regs)
		{
		if (user_mode(regs))
		force_sig(signr, current);

		die_if_no_fixup(str, regs, error);
		}

		#define DO_ERROR(signr, str, name) \
		asmlinkage void do_##name(unsigned long error_code, struct pt_regs *regs) \
		{ \
		do_unhandled_exception(signr, str, error_code, regs); \
		}

		DO_ERROR(SIGILL, "illegal slot instruction", illegal_slot_inst)
		DO_ERROR(SIGSEGV, "address error (exec)", address_error_exec)

		#if defined(CONFIG_SH64_ID2815_WORKAROUND)

		#define OPCODE_INVALID 0
		#define OPCODE_USER_VALID 1
		#define OPCODE_PRIV_VALID 2

		/* getcon/putcon - requires checking which control register is referenced. */
		#define OPCODE_CTRL_REG 3

		/* Table of valid opcodes for SHmedia mode.
		Form a 10-bit value by concatenating the major/minor opcodes i.e.
		opcode[31:26,20:16]. The 6 MSBs of this value index into the following
		array. The 4 LSBs select the bit-pair in the entry (bits 1:0 correspond to
		LSBs==4'b0000 etc). */
		static unsigned long shmedia_opcode_table[64] = {
		0x55554044,0x54445055,0x15141514,0x14541414,0x00000000,0x10001000,0x01110055,0x04050015,
		0x00000444,0xc0000000,0x44545515,0x40405555,0x55550015,0x10005555,0x55555505,0x04050000,
		0x00000555,0x00000404,0x00040445,0x15151414,0x00000000,0x00000000,0x00000000,0x00000000,
		0x00000055,0x40404444,0x00000404,0xc0009495,0x00000000,0x00000000,0x00000000,0x00000000,
		0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x80005050,0x04005055,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,0x55555555,
		0x81055554,0x00000404,0x55555555,0x55555555,0x00000000,0x00000000,0x00000000,0x00000000
		};

		/* Workaround SH5-101 cut2 silicon defect #2815 :
		in some situations, inter-mode branches from SHcompact -> SHmedia
		which should take ITLBMISS or EXECPROT exceptions at the target
		falsely take RESINST at the target instead. */
		void do_reserved_inst(unsigned long error_code, struct pt_regs *regs)
		{
		insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */
		unsigned long pc, aligned_pc;
		unsigned long index, shift;
		unsigned long major, minor, combined;
		unsigned long reserved_field;
		int opcode_state;
		int get_user_error;
		int signr = SIGILL;
		char *exception_name = "reserved_instruction";

		pc = regs->pc;

		/* SHcompact is not handled */
		if (unlikely((pc & 3) == 0))
		goto out;

		/* SHmedia : check for defect. This requires executable vmas
		to be readable too. */
		aligned_pc = pc & ~3;
		if (!access_ok(VERIFY_READ, aligned_pc, sizeof(insn_size_t)))
		get_user_error = -EFAULT;
		else
		get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc);

		if (get_user_error < 0) {
		/*
		* Error trying to read opcode. This typically means a
		* real fault, not a RESINST any more. So change the
		* codes.
		*/
		exception_name = "address error (exec)";
		signr = SIGSEGV;
		goto out;
		}

		/* These bits are currently reserved as zero in all valid opcodes */
		reserved_field = opcode & 0xf;
		if (unlikely(reserved_field))
		goto out; /* invalid opcode */

		major = (opcode >> 26) & 0x3f;
		minor = (opcode >> 16) & 0xf;
		combined = (major << 4) \| minor;
		index = major;
		shift = minor << 1;
		opcode_state = (shmedia_opcode_table[index] >> shift) & 0x3;
		switch (opcode_state) {
		case OPCODE_INVALID:
		/* Trap. */
		break;
		case OPCODE_USER_VALID:
		/*
		* Restart the instruction: the branch to the instruction
		* will now be from an RTE not from SHcompact so the
		* silicon defect won't be triggered.
		*/
		return;
		case OPCODE_PRIV_VALID:
		if (!user_mode(regs)) {
		/*
		* Should only ever get here if a module has
		* SHcompact code inside it. If so, the same fix
		* up is needed.
		*/
		return; /* same reason */
		}

		/*
		* Otherwise, user mode trying to execute a privileged
		* instruction - fall through to trap.
		*/
		break;
		case OPCODE_CTRL_REG:
		/* If in privileged mode, return as above. */
		if (!user_mode(regs))
		return;

		/* In user mode ... */
		if (combined == 0x9f) { /* GETCON */
		unsigned long regno = (opcode >> 20) & 0x3f;

		if (regno >= 62)
		return;

		/* reserved/privileged control register => trap */
		} else if (combined == 0x1bf) { /* PUTCON */
		unsigned long regno = (opcode >> 4) & 0x3f;

		if (regno >= 62)
		return;

		/* reserved/privileged control register => trap */
		}

		break;
		default:
		/* Fall through to trap. */
		break;
		}

		out:
		do_unhandled_exception(signr, exception_name, error_code, regs);
		}

		#else /* CONFIG_SH64_ID2815_WORKAROUND */

		/* If the workaround isn't needed, this is just a straightforward reserved
		instruction */
		DO_ERROR(SIGILL, "reserved instruction", reserved_inst)

		#endif /* CONFIG_SH64_ID2815_WORKAROUND */

		/* Called with interrupts disabled */
		asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
		{
		die_if_kernel("exception", regs, ex);
		}

		asmlinkage int do_unknown_trapa(unsigned long scId, struct pt_regs *regs)
		{
		/* Syscall debug */
		printk("System call ID error: [0x1#args:8 #syscall:16 0x%lx]\n", scId);

		die_if_kernel("unknown trapa", regs, scId);

		return -ENOSYS;
		}

		/* Implement misaligned load/store handling for kernel (and optionally for user
		mode too). Limitation : only SHmedia mode code is handled - there is no
		handling at all for misaligned accesses occurring in SHcompact code yet. */

		asmlinkage void do_address_error_load(unsigned long error_code, struct pt_regs *regs)
		{
		if (misaligned_fixup(regs) < 0)
		do_unhandled_exception(SIGSEGV, "address error(load)",
		error_code, regs);
		}

		asmlinkage void do_address_error_store(unsigned long error_code, struct pt_regs *regs)
		{
		if (misaligned_fixup(regs) < 0)
		do_unhandled_exception(SIGSEGV, "address error(store)",
		error_code, regs);
		}

		asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
		@@ -797,10 +802,9 @@ asmlinkage void do_debug_interrupt(unsigned long code, struct pt_regs *regs)
		of access we make to them - just go direct to their physical
		addresses. */
		exp_cause = peek_real_address_q(DM_EXP_CAUSE_PHY);
		if (exp_cause & ~4) {
		if (exp_cause & ~4)
		printk("DM.EXP_CAUSE had unexpected bits set (=%08lx)\n",
		(unsigned long)(exp_cause & 0xffffffff));
		}
		show_state();
		/* Clear all DEBUGINT causes */
		poke_real_address_q(DM_EXP_CAUSE_PHY, 0x0);