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Commit 02255c68 authored by Sachin Mohan Gadag's avatar Sachin Mohan Gadag Committed by Yamit Mehta
Browse files

ASoC: apq8009: add changes to enable lpass_mclk for apq8009 



Modify audio_ref_clk_probe and lpass_mclk_prepare functions to read
lpass-csr-gpio-mux-spkrctl register and lpass-clock values from dtsi to
enable lpass_mclk.

CRs-fixed: 1056157
Change-Id: I61bb62e89f494b0f4ab94f0287501a3d55fcd02a
Signed-off-by: default avatarYamit Mehta <ymehta@codeaurora.org>
parent d131d125

sound/soc/codecs/audio-ext-clk.c

+85 −24
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ struct audio_ext_ap_clk2 { 
struct audio_ext_lpass_mclk {

	struct pinctrl_info pnctrl_info;

	struct clk c;

	u32 lpass_clock;

	void __iomem *lpass_csr_gpio_mux_spkrctl_vaddr;

};



static struct afe_clk_set clk2_config = {
@@ -163,7 +165,8 @@ static int audio_ext_lpass_mclk_prepare(struct clk *clk) 
	struct audio_ext_lpass_mclk *audio_lpass_mclk;

	struct pinctrl_info *pnctrl_info;

	struct afe_clk_cfg *lpass_clk = NULL;

	int ret;

	int ret, val = 0;

	struct afe_digital_clk_cfg tasha_digital_cdc_clk;



	audio_lpass_mclk = container_of(clk, struct audio_ext_lpass_mclk, c);

	pnctrl_info = &audio_lpass_mclk->pnctrl_info;
@@ -179,21 +182,47 @@ static int audio_ext_lpass_mclk_prepare(struct clk *clk) 
			pr_err("%s: active state select failed with %d\n",

				__func__, ret);

			ret = -EIO;

			goto err;

			goto done;

		}

	}



	if (!audio_lpass_mclk->lpass_clock) {

		memcpy(lpass_clk, &lpass_default, sizeof(struct afe_clk_cfg));

		lpass_clk->clk_val2 = Q6AFE_LPASS_OSR_CLK_12_P288_MHZ;

		lpass_clk->clk_set_mode = Q6AFE_LPASS_MODE_CLK2_VALID;

	ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX, lpass_clk);

		ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,

				lpass_clk);

		if (ret < 0) {

			pr_err("%s afe_set_lpass_clock failed, ret = %d\n",

					__func__, ret);

			kfree(lpass_clk);

			return -EINVAL;

		}

err:

	} else {

		tasha_digital_cdc_clk.i2s_cfg_minor_version =

			AFE_API_VERSION_I2S_CONFIG;

		tasha_digital_cdc_clk.clk_val = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;

		tasha_digital_cdc_clk.clk_root = 5;

		tasha_digital_cdc_clk.reserved = 0;



		if (audio_lpass_mclk->lpass_csr_gpio_mux_spkrctl_vaddr) {

			val = ioread32(audio_lpass_mclk->

					lpass_csr_gpio_mux_spkrctl_vaddr);

			val = val | 0x00000002;

			iowrite32(val, audio_lpass_mclk->

					lpass_csr_gpio_mux_spkrctl_vaddr);

		}

		ret = afe_set_digital_codec_core_clock(

				AFE_PORT_ID_PRIMARY_MI2S_RX ,

				&tasha_digital_cdc_clk);



		if (ret < 0) {

			pr_err("%s afe_set_digital_codec_core_clock failed\n",

					__func__);

			kfree(lpass_clk);

			return ret;

		}

	}

done:

	kfree(lpass_clk);

	return 0;

}
@@ -204,6 +233,7 @@ static void audio_ext_lpass_mclk_unprepare(struct clk *clk) 
	struct pinctrl_info *pnctrl_info;

	struct afe_clk_cfg *lpass_clk = NULL;

	int ret;

	struct afe_digital_clk_cfg tasha_digital_cdc_clk;



	audio_lpass_mclk = container_of(clk, struct audio_ext_lpass_mclk, c);

	pnctrl_info = &audio_lpass_mclk->pnctrl_info;
@@ -214,7 +244,7 @@ static void audio_ext_lpass_mclk_unprepare(struct clk *clk) 


	if (pnctrl_info->pinctrl) {

		ret = pinctrl_select_state(pnctrl_info->pinctrl,

					   pnctrl_info->active);

					   pnctrl_info->sleep);

		if (ret) {

			pr_err("%s: active state select failed with %d\n",

				__func__, ret);
@@ -222,14 +252,27 @@ static void audio_ext_lpass_mclk_unprepare(struct clk *clk) 
			goto err;

		}

	}



	if (!audio_lpass_mclk->lpass_clock) {

		memcpy(lpass_clk, &lpass_default, sizeof(struct afe_clk_cfg));

		lpass_clk->clk_val2 = 0;

		lpass_clk->clk_set_mode = Q6AFE_LPASS_MODE_CLK2_VALID;

	ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX, lpass_clk);

		ret = afe_set_lpass_clock(AFE_PORT_ID_SECONDARY_MI2S_RX,

				lpass_clk);

		if (ret < 0)

			pr_err("%s: afe_set_lpass_clock failed, ret = %d\n",

				__func__, ret);



	} else {

		tasha_digital_cdc_clk.clk_val = 0;



		ret = afe_set_digital_codec_core_clock(

				AFE_PORT_ID_PRIMARY_MI2S_RX,

				&tasha_digital_cdc_clk);



		if (ret < 0)

			pr_err("%s: afe_set_digital_codec_core_clock failed, ret = %d\n",

					__func__, ret);

	}

err:

	kfree(lpass_clk);

}
@@ -437,11 +480,26 @@ static int audio_ref_clk_probe(struct platform_device *pdev) 
	u32 mclk_freq;

	const char *mclk_id = "qcom,lpass-mclk-id";

	const char *mclk_str = NULL;

	u32 lpass_csr_gpio_mux_spkrctl_reg = 0;



	ret = of_property_read_u32(pdev->dev.of_node,

			"qcom,lpass-clock",

			&audio_lpass_mclk.lpass_clock);

	if (ret)

		dev_dbg(&pdev->dev, "%s: qcom,lpass-clock is undefined\n",

				__func__);



	ret = of_property_read_u32(pdev->dev.of_node,

			"qcom,codec-mclk-clk-freq",

			&mclk_freq);

	if (!ret && mclk_freq == 12288000) {

	if (!ret && (mclk_freq == 12288000 || audio_lpass_mclk.lpass_clock)) {

		ret = of_property_read_u32(pdev->dev.of_node, "reg",

				&lpass_csr_gpio_mux_spkrctl_reg);

		if (!ret) {

			audio_lpass_mclk.lpass_csr_gpio_mux_spkrctl_vaddr =

				ioremap(lpass_csr_gpio_mux_spkrctl_reg, 4);

		}



		ret = audio_get_pinctrl(pdev, LPASS_MCLK);

		if (ret)

			dev_err(&pdev->dev, "%s: Parsing pinctrl %s failed\n",
@@ -548,6 +606,9 @@ static int audio_ref_clk_remove(struct platform_device *pdev) 
		pnctrl_info->pinctrl = NULL;

	}



	if (audio_lpass_mclk.lpass_csr_gpio_mux_spkrctl_vaddr)

		iounmap(audio_lpass_mclk.lpass_csr_gpio_mux_spkrctl_vaddr);



	return 0;

}