ARM: dts: msm: add tlmm_mem resouce to sdhc_1 for mdmfermium



SDHC1 needs to configure the TLMM register to control the
IO lines connected to it.

Change-Id: I0b634226b94311b32adeb603fc63d06d0c364275
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>

parent c311b680

arch/arm/boot/dts/qcom/mdmfermium.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -608,8 +608,8 @@

		sdhc_1: sdhci@7824900 {
		compatible = "qcom,sdhci-msm";
		reg = <0x7824900 0x200>, <0x7824000 0x800>;
		reg-names = "hc_mem", "core_mem";
		reg = <0x7824900 0x200>, <0x7824000 0x800>, <0x01111000 0x4>;
		reg-names = "hc_mem", "core_mem", "tlmm_mem";

		qcom,cpu-dma-latency-us = <701>;
		qcom,bus-width = <4>;