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Commit 01100c02 authored by Roland Stigge's avatar Roland Stigge Committed by Arnd Bergmann
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ARM: LPC32xx: Fix reset function



In the recent change to the reset function API (commit
7b6d864b), the mode argument changed from a
char to an enum. lpc23xx_restart() only handles REBOOT_SOFT and REBOOT_HARD,
but the new kernel code emits REBOOT_COLD (0) on reboots now which leads to
lpc32xx simply not rebooting (but halting).

This patch fixes this by just resetting unconditionally as on other platforms
(e.g. mach-bcm2835).

Pulling lpc32xx_watchdog_reset() into lpc23xx_restart() since the while() in
lpc23xx_restart() is part of the procedure anyway and lpc32xx_watchdog_reset()
isn't used anywhere else anymore.

Signed-off-by: default avatarRoland Stigge <stigge@antcom.de>
parent 8013e8c7
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+6 −23
Original line number Diff line number Diff line
@@ -56,20 +56,6 @@ int clk_is_sysclk_mainosc(void)
	return 0;
}

/*
 * System reset via the watchdog timer
 */
static void lpc32xx_watchdog_reset(void)
{
	/* Make sure WDT clocks are enabled */
	__raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
		LPC32XX_CLKPWR_TIMER_CLK_CTRL);

	/* Instant assert of RESETOUT_N with pulse length 1mS */
	__raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18));
	__raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC));
}

/*
 * Detects and returns IRAM size for the device variation
 */
@@ -210,16 +196,13 @@ void __init lpc32xx_map_io(void)

void lpc23xx_restart(enum reboot_mode mode, const char *cmd)
{
	switch (mode) {
	case REBOOT_SOFT:
	case REBOOT_HARD:
		lpc32xx_watchdog_reset();
		break;
	/* Make sure WDT clocks are enabled */
	__raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
		LPC32XX_CLKPWR_TIMER_CLK_CTRL);

	default:
		/* Do nothing */
		break;
	}
	/* Instant assert of RESETOUT_N with pulse length 1mS */
	__raw_writel(13000, io_p2v(LPC32XX_WDTIM_BASE + 0x18));
	__raw_writel(0x70, io_p2v(LPC32XX_WDTIM_BASE + 0xC));

	/* Wait for watchdog to reset system */
	while (1)