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Commit 00b9f51e authored by Martin Bugge's avatar Martin Bugge Committed by Mauro Carvalho Chehab
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[media] ths8200: Corrected sync polarities setting



HS_IN/VS_IN was always set to positive.

Acked-by: default avatarLad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: default avatarMartin Bugge <marbugge@cisco.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 8a027faf
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+1 −1
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)
	/* Timing of video input bus is derived from HS, VS, and FID dedicated
	 * inputs
	 */
	ths8200_write(sd, THS8200_DTG2_CNTL, 0x47 | polarity);
	ths8200_write(sd, THS8200_DTG2_CNTL, 0x44 | polarity);

	/* leave reset */
	ths8200_s_stream(sd, true);