Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 007755eb authored by Peter Oruba's avatar Peter Oruba Committed by David S. Miller
Browse files

PCI-X/PCI-Express read control interfaces: use them in e1000 



These driver changes incorporate the proposed PCI-X / PCI-Express read byte
count interface.  Reading and setting those valuse doesn't take place
"manually", instead wrapping functions are called to allow quirks for some
PCI bridges.

Signed-off by: Peter Oruba <peter.oruba@amd.com>
Based on work by Stephen Hemminger <shemminger@linux-foundation.org>
Acked-by: default avatarAuke Kok <auke-jan.h.kok@intel.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 7c32f470

drivers/net/e1000/e1000_hw.c

+3 −22
Original line number Diff line number Diff line
@@ -871,10 +871,6 @@ e1000_init_hw(struct e1000_hw *hw) 
    uint32_t ctrl;

    uint32_t i;

    int32_t ret_val;

    uint16_t pcix_cmd_word;

    uint16_t pcix_stat_hi_word;

    uint16_t cmd_mmrbc;

    uint16_t stat_mmrbc;

    uint32_t mta_size;

    uint32_t reg_data;

    uint32_t ctrl_ext;
@@ -964,23 +960,8 @@ e1000_init_hw(struct e1000_hw *hw) 
        break;

    default:

        /* Workaround for PCI-X problem when BIOS sets MMRBC incorrectly. */

        if (hw->bus_type == e1000_bus_type_pcix) {

            e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd_word);

            e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI,

                &pcix_stat_hi_word);

            cmd_mmrbc = (pcix_cmd_word & PCIX_COMMAND_MMRBC_MASK) >>

                PCIX_COMMAND_MMRBC_SHIFT;

            stat_mmrbc = (pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK) >>

                PCIX_STATUS_HI_MMRBC_SHIFT;

            if (stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K)

                stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K;

            if (cmd_mmrbc > stat_mmrbc) {

                pcix_cmd_word &= ~PCIX_COMMAND_MMRBC_MASK;

                pcix_cmd_word |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;

                e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER,

                    &pcix_cmd_word);

            }

        }

	if (hw->bus_type == e1000_bus_type_pcix && e1000_pcix_get_mmrbc(hw) > 2048)

		e1000_pcix_set_mmrbc(hw, 2048);

	break;

    }

drivers/net/e1000/e1000_hw.h

+2 −0
Original line number Diff line number Diff line
@@ -424,6 +424,8 @@ void e1000_pci_clear_mwi(struct e1000_hw *hw); 
void e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);

void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);

int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value);

void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc);

int e1000_pcix_get_mmrbc(struct e1000_hw *hw);

/* Port I/O is only supported on 82544 and newer */

void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);

int32_t e1000_disable_pciex_master(struct e1000_hw *hw);

drivers/net/e1000/e1000_main.c

+14 −0
Original line number Diff line number Diff line
@@ -4903,6 +4903,20 @@ e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 
	pci_write_config_word(adapter->pdev, reg, *value);

}



int

e1000_pcix_get_mmrbc(struct e1000_hw *hw)

{

	struct e1000_adapter *adapter = hw->back;

	return pcix_get_mmrbc(adapter->pdev);

}



void

e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)

{

	struct e1000_adapter *adapter = hw->back;

	pcix_set_mmrbc(adapter->pdev, mmrbc);

}



int32_t

e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)

{